Importance

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Abstract

Each of a plurality of devices or agents connected to a computer system bus is provided with a mechanism for unilaterally and dynamically limiting the depth of a pipeline of the bus. Each agent includes a state machine which indicates whether the bus is in a throttled state, a stalled state or a free state. When in a free state, an agent having control of the bus may transmit any number of bus transactions and the depth of the pipeline may therefore increase. In the throttled state, the agent may transmit only a single bus transaction from the throttled state. The state machine always transitions either to the stalled state or to the free state. In the stalled state, no agents may transmit transactions onto the bus and the depth of the pipeline therefore cannot increase and instead may decrease with time as previously issued transactions are drained from the bus. Wired-OR logic is employed for allowing an agent to transmit a state transition signal to all other agents on the bus changing the state of the various state machines. Only a single state transition signal is required to completely control the state of the state machines. By employing wired-OR logic, any particular agent is capable of switching the state machines into a stalled state to prevent new bus transactions from being issued to the bus. In this manner, each agent is capable of unilaterally restricting or limiting the depth of the pipeline. Hardware or software is provided within each agent to control the state machine in a manner such that all state machines remain synchronized with each indicating the same state at substantially the same time.

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First Claim