Method and apparatus for detecting single or multiple bit errors instorage devices

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United States of America Patent

PATENT NO 5550849
SERIAL NO

08064226

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method and system for detecting and correcting all single bit errors in a data word, for detecting all 2-bit errors regardless of whether the two bits in error are consecutive, and for detecting all consecutive 3-bit and 4-bit errors regardless of whether the three bits or four bits are in a single byte. In a preferred embodiment, a set of check bits are established for the data word by exclusively ORing a set of data bits that are unique to each check bit, storing the data bits and check bits, retrieving the data bits, generating a new set of check bits from the retrieved data bits, and comparing the new set of check bits against the old set to establish a syndrome pattern which may be expressed as a hexadecimal for comparison with hexadecimals previously assigned to the data bits.

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Patent Owner(s)

  • DIGITAL DATA FUNDING LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Harrington, Gary L Colorado Springs, CO 7 556

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