Method and apparatus for interrupt/SMI# ordering
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United States of America Patent
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Aug 27, 1996
Grant Date -
N/A
app pub date -
Dec 1, 1994
filing date -
Dec 1, 1994
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A circuit for controlling interrupt request signal transmission in a computer system. An input receives an interrupt request from an external component. First circuitry coupled to the input generates a signal in response to the interrupt request from the external component. The signal causes a processor to switch to fully operational mode. Second circuitry coupled to the input generates an interrupt request signal to the processor in response to the interrupt request from the external component. A signal processing circuit coupled to the second circuitry suppresses transmission of the interrupt request signal to the processor until the signal is transmitted to the processor.
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