Circuit and method of series biasing a single-ended mixer

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United States of America Patent

PATENT NO 5551076
SERIAL NO

08300768

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Abstract

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A mixer circuit (10) combines a buffered RF signal with the LO signal at the gate of a mixing transistor (20) for providing sum and difference product terms as the IF output signal. An inductor (46) provides a DC signal path between the source of the mixing transistor and the drain of the buffering transistor (14) to share the same operating current and thereby reduce power consumption in the mixer. The DC path inductor provides a high impedance to block the RF signal and LO signal. A bias circuit (26, 28) sets the bias point at the gate of the mixing transistor to a mid-point value between V.sub.DD and ground potential. In disable mode, the bias point of the mixing transistor is sufficiently low that the LO signal does not have sufficient power to turn on buffering and mixing transistors that could generate mixing products at the IF output.

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Patent Owner(s)

Patent OwnerAddress
SHENZHEN XINGUODU TECHNOLOGY CO LTD518000 17B JINSONG BUILDING TAIRAN 4TH ROAD SHATOU STREET FUTIAN DISTRICT SHENZHEN CITY GUANGDONG PROVINCE SHENZHEN CITY GUANGDONG PROVINCE 518000

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bonn, Fred H Chandler, AZ 2 159

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