Digital phase locked loop circuit

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United States of America Patent

PATENT NO 5552727
SERIAL NO

08316463

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Abstract

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A digital circuit apparatus having an A/D converter for digitalizing a control voltage which determines the oscillation frequency of an internal clock outputted from a voltage-controlled oscillator, a storing unit for holding a digitalized value, a D/A converter with corrective function for correcting the digital value being held and subjecting the corrected digital value to D/A conversion, and a lock detector for detecting the matching in phase of the internal clock and an external clock. Phase information obtained when the internal clock and the external clock match in phase is held so that, when the generation of the internal clock outputted from the voltage-controlled oscillator is halted and then resumed, the matching in phase of the external clock and internal clock can be achieved in a short period of time.

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Patent Owner(s)

Patent OwnerAddress
MITSUBISHI DENKI KABUSHIKI KAISHA2-3 MARUNOUCHI 2-CHOME CHIYODA-KU TOKYO JAPAN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nakao, Yuichi Itami, JP 74 632

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