Apparatus and method for generating a phase-controlled clock signal
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United States of America Patent
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Sep 17, 1996
Grant Date -
N/A
app pub date -
Apr 15, 1994
filing date -
Apr 15, 1994
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and apparatus are provided for generating a phase-controlled clock signal within a microprocessor. A first clock signal having a first frequency is input. After a reset event, the first clock signal transitions in a first direction at a time t. A second clock signal is output having a second frequency related to the first frequency by a non-integer ratio. The second clock signal transitions in the same direction as the first clock signal at time t.
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