Output buffer circuit changeable of the output signal from a low to a high impedance state
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United States of America Patent
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Oct 8, 1996
Grant Date -
N/A
app pub date -
Feb 28, 1994
filing date -
Apr 28, 1993
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
An output buffer circuit includes a pull-down side transistor connected between an output terminal and a low-potential power source. The pull-down side transistor is driven by an input signal, such that when the pull-down side transistor is turned on by the input signal, a low level output signal is output from the output terminal. A pull-up circuit is connected between the output terminal and a high-potential power source, for changing the output signal to a high level in accordance with the input signal when the transistor is turned off in response to the input signal. The pull-up circuit ceases to function when the output signal goes high thereby creating a high impedance condition. The pull-up circuit includes an OR gate which receives the input signal and the output signal, and an inverter which receives an output signal of the OR gate. A differentiating circuit is provided, through which an output signal of the inverter circuit is output to the output terminal.
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