Selector circuit selecting and outputting voltage applied to one of first and second terminal in response to voltage level applied to first terminal
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United States of America Patent
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Oct 8, 1996
Grant Date -
N/A
app pub date -
Aug 12, 1994
filing date -
Aug 13, 1993
priority date (Note) -
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Abstract
A selector circuit is disclosed for a semiconductor memory circuit having a power circuit producing an internal power voltage lower than an external power voltage and including a reference voltage generator generating a reference voltage and a voltage source circuit responding to the reference voltage and supplying the internal power voltage to a memory cell array. The selector circuit includes a first input node connected to receive the reference voltage, a second input node connected to a terminal pad and an output line connected to the voltage source circuit, the terminal pad being supplied with a test voltage in a test mode of the memory circuit and brought into an open state in a normal operation mode of the memory circuit. The selector circuit responds the voltage at the second input node and forms an electrical path between the first input node and the output line in the test mode and between the second input node and the output line in the normal operation mode.
First Claim
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
- NEC ELECTRONICS CORPORATION
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Tsukada, Shyuichi | Tokyo, JP | 13 | 381 |
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Fee | Large entity fee | small entity fee | micro entity fee |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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