Circuit and method for detecting segment limit errors for code fetches
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United States of America Patent
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Oct 8, 1996
Grant Date -
N/A
app pub date -
Feb 8, 1994
filing date -
Feb 8, 1994
priority date (Note) -
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status (Latency Note)
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Abstract
A segment limit check circuit performs limit checks on fetch addresses generated by a CPU. The circuit and method for performing the fetch limit check are simplified over the prior art by effectively moving the fetch limit check to linear address space. For a microprocessor that uses physical addresses of 32-bits and performs fetches as 16-byte aligned accesses, the circuit of the present invention generates a 33-bit linear address and a 33-bit upper limit value. A comparator compares the upper 29 bits of the linear address with the upper 29-bits of the upper limit value. If a match occurs, the circuit decodes the 4 low-order bits of the upper limit value to determine which of the 16 instruction bytes (if any) fall outside the segment limit.
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