Circuit for providing a compensated bias voltage
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United States of America Patent
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Oct 22, 1996
Grant Date -
N/A
app pub date -
Dec 16, 1994
filing date -
Dec 16, 1994
priority date (Note) -
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status (Latency Note)
Importance
Abstract
A bias circuit for generating a bias voltage over variations in the power supply voltage and over process parameters is disclosed. The bias circuit utilizes a voltage divider to generate a divided voltage based on the power supply value. The divided voltage is applied to the gate of a modulating transistor (biased in saturation) in a current mirror, which controls a current applied to a linear load device biased in the linear region. The voltage across the load device determines the bias voltage. Variations in the power supply voltage are thus reflected in the bias voltage, such that the gate-to-source voltage of the series transistor is constant over variations in power supply voltage. Variations in process parameters that produce different transistor current drive characteristics are reflected in a variations of the bias voltage produced by the linear load device. The bias circuit may control the slew rate of an output driver, may control the propagation delay through a delay element, and be used to control the duration of a pulse produced by a pulse generating circuit.
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