Flash memory wear leveling system providing immediate direct access to microprocessor
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United States of America Patent
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Oct 22, 1996
Grant Date -
N/A
app pub date -
Apr 14, 1995
filing date -
Apr 14, 1995
priority date (Note) -
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Abstract
A system for equal utilization of blocks of flash memory whereby a processor using algorithmic software functions to sort the usage-value of each block of flash memory so that the system will select the least-used memory block for the next cycle of memory usage. The described system provides direct and immediate access of flash memory to the microprocessor without any intermediate modules or vias which would delay that access. Further, a minimal amount of overhead header information is only required for each flash memory block thus allowing greater areas of memory usage for instructional code data.
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