Importance

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Abstract

Boot firmware is manipulated within separately erasable/writable blocks of a flash EEPROM, and a non-volatile memory bit circuit is used to force manipulation of address space associated with the blocks to provide a powerfail durable flash upgrade for the EEPROM without the need for a separate ROM. During a firmware upgrade in the EEPROM, a block in the EEPROM is erased, other than the primary boot block, and is designated as an alternate boot block. The primary boot block firmware contents are then copied to the alternate boot block, and the non-volatile memory bit is set to cause the alternate boot block to appear in the address space of the primary boot block from a microprocessor's perspective. The primary boot block is then erased and written with new firmware information. The non-volatile memory bit is then reset back to allow the primary boot block to appear in its proper address space, and the alternate boot block is upgraded with its new firmware information. This system and method provides for the retaining of primary boot block firmware in an EEPROM during an upgrade so that if a powerfail occurs during the upgrade, the primary boot block information is still available in the EEPROM, thus eliminating the need for a separate ROM which would normally contain primary boot block information in the event of a powerfail.

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First Claim