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Abstract

A purely digital randomizer system generates an undeterministic data block using standard cell library units and includes a random number generator. The generator preferably includes at least two metastable blocks that each include a plurality of D-type flip-flops. Each flip-flop is coupled to a dedicated free-running oscillator whose frequency is based on a relative prime number for each frequency leg. Each of the D-type flip-flops is also coupled to receive a common jitter clock signal. The flip-flops are thus forcibly operated in a metastable state by intentionally violating the flip-flop set-up or hold time margins of incoming data relative to the jitter clock. To further maximize entropy, the flip-flop outputs are exclusively `OR`d ('EX-OR'd') and then passed through first and second shift registers of uneven and preferably even and odd bit lengths. Preferably each shift register includes at least one metastably-operated D-type flip-flop, to further promote randomness. The shift register outputs are combined in an EX-OR tree are cross-fed back to the EX-ORs at the shift register inputs. The input from each shift register is then EX-OR'd and clocked out with a system clock to provide first and second channels of undeterministic data.

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