US Patent No: 5,570,315

Number of patents in Portfolio can not be more than 2000

Multi-state EEPROM having write-verify control circuit

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Abstract

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An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data circuits for temporarily storing data for controlling write operation states of the plurality of memory cells, a write circuit for performing a write operation in accordance with the contents of the data circuits respectively corresponding to the memory cells, a write verify circuit for confirming states of the memory cells set upon the write operation, and a data updating circuit for updating the contents of the data circuits such that a rewrite operation is performed to only a memory cell, in which data is not sufficiently written, on the basis of the contents of the data circuits and the states of the memory cells set upon the write operation. A write operation, a write verify operation, and a data circuit content updating operation based on the contents of the data circuits are repeatedly performed until the memory cells are set in predetermined written states.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
KABUSHIKI KAISHA TOSHIBATOKYO26617

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hemink, Gertjan Kawasaki, JP 23 2411
Tanaka, Tomoharu Yokohama, JP 285 11315

Cited Art Landscape

Patent Info (Count) # Cites Year
 
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* Cited By Examiner

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
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6,944,068 Method and system for programming and inhibiting multi-level, non-volatile memory cells 12 2004
* 2004/0179,404 Method and system for programming and inhibiting multi-level, non-volatile memory cells 2 2004
7,177,184 Selective operation of a multi-state non-volatile memory system in a binary mode 99 2004
* 2004/0190,337 Selective operation of a multi-state non-volatile memory system in a binary mode 3 2004
7,420,846 Read and erase verify methods and circuits suitable for low voltage non-volatile memories 2 2004
* 2007/0058,435 Read and erase verify methods and circuits suitable for low voltage non-volatile memories 3 2004
7,057,939 Non-volatile memory and control with improved partial page program capability 83 2004
* 2005/0237,814 NON-VOLATILE MEMORY AND CONTROL WITH IMPROVED PARTIAL PAGE PROGRAM CAPABILITY 7 2004
7,023,733 Boosting to control programming of non-volatile memory 36 2004
7,020,026 Bitline governed approach for program control of non-volatile memory 50 2004
* 2005/0248,989 BITLINE GOVERNED APPROACH FOR PROGRAM CONTROL OF NON-VOLATILE MEMORY 2 2004
* 2005/0248,988 Boosting to control programming of non-volatile memory 1 2004
7,177,197 Latched programming of memory and method 53 2004
* 2004/0240,269 Latched programming of memory and method 10 2004
8,429,313 Configurable ready/busy control 1 2004
* 2005/0268,025 Configurable ready/busy control 11 2004
7,009,889 Comprehensive erase verification for non-volatile memory 58 2004
7,548,461 Soft errors handling in EEPROM devices 0 2004
* 2004/0237,010 Soft errors handling in EEPROM devices 6 2004
7,554,842 Multi-purpose non-volatile memory card 15 2004
* 2005/0007,801 Multi-purpose non-volatile memory card 10 2004
8,375,146 Ring bus structure and its use in flash memory systems 1 2004
* 2006/0031,593 Ring bus structure and its use in flash memory systems 142 2004
8,051,257 Non-volatile memory and method with control data management 3 2004
7,437,631 Soft errors handling in EEPROM devices 4 2004
* 2005/0144,365 Non-volatile memory and method with control data management 92 2004
6,870,768 Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells 98 2004
7,616,484 Soft errors handling in EEPROM devices 22 2004
* 2005/0083,726 Soft errors handling EEPROM devices 22 2004
7,441,067 Cyclic flash memory wear leveling 204 2004
7,092,290 High speed programming system with reduced over programming 42 2004
* 2006/0104,120 High speed programming system with reduced over programming 5 2004
7,395,404 Cluster auto-alignment for storing addressable data packets in a non-volatile memory array 38 2004
7,383,375 Data run programming 9 2004
7,315,916 Scratch pad block 65 2004
* 2006/0161,722 Scratch pad block 7 2004
* 2006/0136,655 Cluster auto-alignment 7 2004
7,046,568 Memory sensing circuit and method for low voltage operation 142 2004
* 2005/0169,082 Memory sensing circuit and method for low voltage operation 14 2004
* 2005/0144,367 Data run programming 14 2004
7,882,299 System and method for use of on-chip non-volatile memory write cache 2 2004
* 2006/0136,656 System and method for use of on-chip non-volatile memory write cache 39 2004
6,980,471 Substrate electron injection techniques for programming non-volatile charge storage memory cells 13 2004
7,450,433 Word line compensation in non-volatile memory erase operations 28 2004
* 2006/0140,012 Word line compensation in non-volatile memory erase operations 15 2004
7,102,924 Techniques of recovering data from memory cells affected by field coupling with adjacent memory cells 82 2005
7,046,548 Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells 9 2005
* 2005/0146,931 Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells 1 2005
7,877,539 Direct data file storage in flash memories 6 2005
* 2006/0184,720 Direct data file storage in flash memories 72 2005
7,035,146 Programming non-volatile memory 37 2005
* 2005/0157,552 Programming non-volatile memory 5 2005
7,251,160 Non-volatile memory and method with power-saving read and program-verify operations 41 2005
* 2006/0209,592 Non-volatile memory and method with power-saving read and program-verify operations 3 2005
7,206,230 Use of data latches in cache operations of non-volatile memories 73 2005
7,173,854 Non-volatile memory and method with compensation for source line bias errors 37 2005
7,170,784 Non-volatile memory and method with control gate compensation for source line bias errors 25 2005
7,158,421 Use of data latches in multi-phase programming of non-volatile memories 70 2005
* 2006/0221,697 USE OF DATA LATCHES IN MULTI-PHASE PROGRAMMING OF NON-VOLATILE MEMORIES 9 2005
* 2006/0221,694 Non-volatile memory and method with control gate compensation for source line bias errors 1 2005
* 2006/0221,704 Use of data latches in cache operations of non-volatile memories 9 2005
7,173,859 Faster programming of higher level states in multi-level cell flash memory 122 2005
* 2006/0120,165 Faster programming of higher level states in multi-level cell flash memory 10 2005
7,457,910 Method and system for managing partitions in a storage device 14 2005
* 2007/0002,612 Method and system for managing partitions in a storage device 14 2005
7,412,560 Non-volatile memory and method with multi-stream updating 14 2005
7,386,655 Non-volatile memory and method with improved indexing for scratch pad and update blocks 14 2005
7,366,826 Non-volatile memory and method with multi-stream update tracking 12 2005
* 2006/0155,921 Non-volatile memory and method with multi-stream update tracking 7 2005
* 2006/0155,920 Non-volatile memory and method with multi-stream updating 13 2005
7,230,854 Method for programming non-volatile memory with self-adjusting maximum program loop 11 2005
* 2007/0025,157 METHOD FOR PROGRAMMING NON-VOLATILE MEMORY WITH SELF-ADJUSTING MAXIMUM PROGRAM LOOP 60 2005
7,023,737 System for programming non-volatile memory with self-adjusting maximum program loop 33 2005
7,630,237 System and method for programming cells in non-volatile integrated memory devices 1 2005
9,104,315 Systems and methods for a mass data storage system having a file-based interface to a host and a non-file-based interface to secondary storage 0 2005
7,627,733 Method and system for dual mode access for storage devices 9 2005
7,480,766 Interfacing systems operating through a logical address space and on a direct data file basis 37 2005
7,230,847 Substrate electron injection techniques for programming non-volatile charge storage memory cells 10 2005
* 2006/0139,998 Substrate electron injection techniques for programming non-volatile charge storage memory cells 1 2005
7,280,408 Bitline governed approach for programming non-volatile memory 14 2005
7,088,621 Bitline governed approach for coarse/fine programming 40 2005
* 2006/0050,561 Bitline governed approach for program control of non-volatile memory 2 2005
7,095,654 Method and system for programming and inhibiting multi-level, non-volatile memory cells 24 2005
* 2006/0007,736 Method and system for programming and inhibiting multi-level, non-volatile memory cells 0 2005
7,239,551 Non-volatile memory and method with reduced neighboring field errors 7 2005
7,814,262 Memory system storing transformed units of data in fixed sized storage blocks 1 2005
7,529,905 Method of storing transformed units of data in a memory system having fixed sized storage blocks 75 2005
7,215,574 Non-volatile memory and method with bit line compensation dependent on neighboring operating modes 23 2005
* 2007/0088,904 Memory system storing transformed units of data in fixed sized storage blocks 26 2005
* 2007/0086,260 Method of storing transformed units of data in a memory system having fixed sized storage blocks 133 2005
* 2006/0034,121 Non-volatile memory and method with bit line compensation dependent on neighboring operating modes 6 2005
7,286,406 Method for controlled programming of non-volatile memory exhibiting bit line coupling 10 2005
7,206,235 Apparatus for controlled programming of non-volatile memory exhibiting bit line coupling 30 2005
7,984,084 Non-volatile memory with scheduled reclaim operations 5 2005
7,409,489 Scheduling of reclaim operations in non-volatile memory 13 2005
* 2007/0033,324 Scheduling of reclaim operations in non-volatile memory 6 2005
7,631,162 Non-volatile memory with adaptive handling of data writes 5 2005
7,509,471 Methods for adaptively handling data writes in non-volatile memories 57 2005
7,366,022 Apparatus for programming of multi-state non-volatile memory using smart verify 14 2005
7,301,817 Method for programming of multi-state non-volatile memory using smart verify 99 2005
* 2007/0097,747 Apparatus for programming of multi-state non-volatile memory using smart verify 2 2005
* 2007/0097,749 Method for programming of multi-state non-volatile memory using smart verify 4 2005
* 2007/0101,095 Methods for adaptively handling data writes in non-volatile memories 30 2005
7,447,066 Memory with retargetable memory cell redundancy 20 2005
7,379,330 Retargetable memory cell redundancy methods 9 2005
* 2007/0103,978 Memory with retargetable memory cell redundancy 33 2005
* 2007/0103,977 Retargetable memory cell redundancy methods 8 2005
7,414,887 Variable current sinking for coarse/fine programming of non-volatile memory 15 2005
7,747,927 Method for adapting a memory system to operate with a legacy host originally designed to operate with a different memory system 6 2005
7,739,472 Memory system for legacy hosts 2 2005
* 2007/0136,639 Method for adapting a memory system to operate with a legacy host originally designed to operate with a different memory system 3 2005
7,739,078 System for managing appliances 1 2005
7,353,073 Method for managing appliances 6 2005
* 2007/0129,812 Method for managing appliances 23 2005
7,737,483 Low resistance void-free contacts 2 2005
7,615,448 Method of forming low resistance void-free contacts 2 2005
7,486,564 Soft programming non-volatile memory utilizing individual verification and additional soft programming of subsets of memory cells 11 2005
7,430,138 Erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells 24 2005
7,408,804 Systems for soft programming non-volatile memory utilizing individual verification and additional soft programming of subsets of memory cells 87 2005
7,403,424 Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells 23 2005
7,403,428 Systems for erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells 8 2005
7,400,537 Systems for erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells 21 2005
* 2007/0128,787 Method of forming low resistance void-free contacts 16 2005
* 2007/0126,028 Low resistance void-free contacts 5 2005
* 2006/0221,708 Erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells 6 2005
* 2006/0221,709 Systems for erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells 1 2005
* 2006/0221,703 Systems for erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells 0 2005
* 2006/0221,660 Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells 1 2005
* 2006/0221,705 Soft programming non-volatile memory utilizing individual verification and additional soft programming of subsets of memory cells 94 2005
7,877,540 Logically-addressed file storage methods 1 2005
* 2007/0136,555 Logically-addressed file storage methods 32 2005
7,420,847 Multi-state memory having data recovery after program fail 94 2005
7,345,928 Data recovery methods in multi-state memory after program fail 130 2005
* 2006/0126,394 Multi-state memory having data recovery after program fail 10 2005
* 2006/0126,393 Data recovery methods in multi-state memory after program fail 4 2005
7,355,888 Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages 13 2005
7,355,889 Method for programming non-volatile memory with reduced program disturb using modified pass voltages 29 2005
7,315,917 Scheduling of housekeeping operations in flash memory systems 50 2005
* 2007/0171,719 Method for programming non-volatile memory with reduced program disturb using modified pass voltages 14 2005
* 2007/0171,718 Apparatus for programming non-volatile memory with reduced program disturb using modified pass voltages 0 2005
* 2006/0161,728 Scheduling of housekeeping operations in flash memory systems 30 2005
8,683,081 Methods for displaying advertisement content on host system using application launched from removable memory device 0 2005
8,683,082 Removable memory devices for displaying advertisement content on host systems using applications launched from removable memory devices 0 2005
8,291,151 Enhanced host interface 0 2005
8,161,289 Voice controlled portable memory storage device 1 2005
7,917,949 Voice controlled portable memory storage device 3 2005
7,793,068 Dual mode access for non-volatile storage devices 3 2005
7,769,978 Method and system for accessing non-volatile storage devices 7 2005
7,747,837 Method and system for accessing non-volatile storage devices 12 2005
7,655,536 Methods of forming flash devices with shared word lines 1 2005
7,512,014 Comprehensive erase verification for non-volatile memory 5 2005
7,508,720 Systems for comprehensive erase verification in non-volatile memory 3 2005
7,495,294 Flash devices with shared word lines 20 2005
7,463,532 Comprehensive erase verification for non-volatile memory 10 2005
7,450,435 Systems for comprehensive erase verification in non-volatile memory 4 2005
* 2007/0143,833 Voice controlled portable memory storage device 1 2005
* 2007/0143,533 Voice controlled portable memory storage device 1 2005
* 2007/0143,117 Voice controlled portable memory storage device 6 2005
* 2007/0141,780 Methods of forming flash devices with shared word lines 26 2005
* 2007/0138,535 Flash devices with shared word lines 16 2005
* 2007/0130,521 System and method for displaying advertisement using flash memory storage devices 3 2005
* 2007/0112,625 System and method for displaying advertisement using flash memory storage devices 4 2005
* 2007/0033,327 Enhanced host interface 48 2005
* 2006/0133,156 Systems for comprehensive erase verification in non-volatile memory 5 2005
* 2006/0098,493 Comprehensive erase verification for non-volatile memory 4 2005
* 2006/0098,494 Comprehensive erase verification for non-volatile memory 0 2005
8,484,632 System for program code execution with memory storage controller participation 0 2005
8,479,186 Method for program code execution with memory storage controller participation 0 2005
* 2007/0150,884 System for program code execution 5 2005
* 2007/0150,885 Method for program code execution 4 2005
7,436,703 Active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices 9 2005
7,362,615 Methods for active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices 14 2005
* 2007/0147,118 METHODS FOR ACTIVE BOOSTING TO MINIMIZE CAPACITIVE COUPLING EFFECT BETWEEN ADJACENT GATES OF FLASH MEMORY DEVICES 2 2005
* 2007/0147,119 Active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices 0 2005
* 7,616,481 Memories with alternate sensing techniques 10 2005
7,466,590 Self-boosting method for flash memory cells 1 2005
7,349,264 Alternate sensing techniques for non-volatile memories 8 2005
7,327,619 Reference sense amplifier for non-volatile memory 7 2005
7,324,393 Method for compensated sensing in non-volatile memory 35 2005
* 2007/0171,744 Memories with alternate sensing techniques 15 2005
* 2007/0147,113 Alternate sensing techniques for non-volatile memories 51 2005
* 2006/0198,195 Self-boosting method for flash memory cells 3 2005
* 2006/0158,947 Reference sense amplifier for non-volatile memory 6 2005
* 2006/0158,935 Method for compensated sensing in non-volatile memory 2 2005
7,733,704 Non-volatile memory with power-saving multi-pass sensing 2 2005
7,447,094 Method for power-saving multi-pass sensing in non-volatile memory 2 2005
7,443,726 Systems for alternate row-based reading and writing for non-volatile memory 10 2005
* 7,352,629 Systems for continued verification in non-volatile memory write operations 11 2005
7,349,260 Alternate row-based reading and writing for non-volatile memory 7 2005
7,310,255 Non-volatile memory with improved program-verify operations 85 2005
* 7,307,887 Continued verification in non-volatile memory write operations 13 2005
* 2007/0171,746 Non-volatile memory with power-saving multi-pass sensing 7 2005
* 2007/0171,725 Non-volatile memory with improved program-verify operations 1 2005
* 2007/0153,583 Alternate row-based reading and writing for non-volatile memory 4 2005
* 2007/0153,604 Method for power-saving multi-pass sensing in non-volatile memory 5 2005
* 2007/0153,577 Systems for alternate row-based reading and writing for non-volatile memory 1 2005
7,224,614 Methods for improved program-verify operations in non-volatile memories 38 2005
7,394,690 Method for column redundancy using data latches in solid-state memories 6 2006
7,352,635 Method for remote redundancy for non-volatile memory 6 2006
7,324,389 Non-volatile memory with redundancy data buffered in remote buffer circuits 8 2006
* 2007/0223,292 Method for column redundancy using data latches in solid-state memories 1 2006
7,224,605 Non-volatile memory with redundancy data buffered in data latches for defective locations 20 2006
7,301,812 Boosting to control programming of non-volatile memory 8 2006
7,511,995 Self-boosting system with suppression of high lateral electric fields 5 2006
7,428,165 Self-boosting method with suppression of high lateral electric fields 0 2006
* 2007/0236,992 Self-boosting method with suppression of high lateral electric fields 2 2006
* 2007/0236,993 Self-boosting system with suppression of high lateral electric fields 10 2006
7,206,231 System for programming non-volatile memory with self-adjusting maximum program loop 5 2006
* 2007/0025,156 System for programming non-volatile memory with self-adjusting maximum program loop 0 2006
7,951,669 Methods of making flash memory cell arrays having dual control gates per memory cell charge storage element 25 2006
7,467,253 Cycle count storage systems 28 2006
7,451,264 Cycle count storage methods 16 2006
7,502,261 Flash memory cell arrays having dual control gates per memory cell charge storage element 8 2006
7,486,555 Flash memory cell arrays having dual control gates per memory cell charge storage element 3 2006
7,303,956 Flash memory cell arrays having dual control gates per memory cell charge storage element 8 2006
* 2006/0205,120 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 1 2006
* 2006/0187,714 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 5 2006
* 2006/0176,736 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 7 2006
7,440,322 Method and system for flash memory devices 5 2006
7,516,261 Method for U3 adapter 2 2006
7,447,821 U3 adapter 3 2006
* 2008/0005,413 Method for U3 adapter 0 2006
* 2007/0250,655 U3 adapter 0 2006
7,619,922 Method for non-volatile memory with background data latch caching during erase operations 36 2006
7,609,552 Non-volatile memory with background data latch caching during erase operations 1 2006
7,505,320 Non-volatile memory with background data latch caching during program operations 18 2006
7,502,260 Method for non-volatile memory with background data latch caching during program operations 18 2006
7,486,558 Non-volatile memory with managed execution of cached data 6 2006
7,480,181 Non-volatile memory with background data latch caching during read operations 12 2006
7,463,521 Method for non-volatile memory with managed execution of cached data 35 2006
7,447,078 Method for non-volatile memory with background data latch caching during read operations 21 2006
7,436,709 NAND flash memory with boosting 10 2006
* 2007/0258,286 BOOSTING METHODS FOR NAND FLASH MEMORY 16 2006
* 2007/0258,276 NAND Flash Memory with Boosting 3 2006
7,286,408 Boosting methods for NAND flash memory 10 2006
7,280,396 Non-volatile memory and control with improved partial page program capability 8 2006
* 2006/0233,010 Non-Volatile Memory with Background Data Latch Caching During Read Operations 27 2006
* 2006/0233,021 Non-Volatile Memory with Background Data Latch Caching During Erase Operations 19 2006
* 2006/0233,023 Method for Non-Volatile Memory with Background Data Latch Caching During Erase Operations 38 2006
8,055,832 Management of memory blocks that directly store data files 1 2006
7,581,057 Memory system with management of memory blocks that directly store data files 2 2006
7,558,905 Reclaiming data storage capacity in flash memory systems 1 2006
7,453,730 Charge packet metering for coarse/fine programming of non-volatile memory 10 2006
7,450,420 Reclaiming data storage capacity in flash memories 71 2006
7,447,075 Charge packet metering for coarse/fine programming of non-volatile memory 10 2006
* 2007/0030,734 Reclaiming Data Storage Capacity in Flash Memories 13 2006
* 2007/0033,328 Management of Memory Blocks That Directly Store Data Files 35 2006
* 2006/0221,700 Charge packet metering for coarse/fine programming of non-volatile memory 0 2006
* 2006/0203,563 Charge packet metering for coarse/fine programming of non-volatile memory 1 2006
7,840,875 Convolutional coding methods for nonvolatile memory 0 2006
7,376,030 Memory sensing circuit and method for low voltage operation 10 2006
* 2007/0266,295 Convolutional Coding Methods for Nonvolatile Memory 39 2006
7,518,911 Method and system for programming multi-state non-volatile memory devices 5 2006
7,638,834 Flash memory cell arrays having dual control gates per memory cell charge storage element 2 2006
7,269,069 Non-volatile memory and method with bit line to bit line coupled compensation 13 2006
* 2006/0202,256 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 24 2006
7,391,650 Method for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates 15 2006
7,342,831 System for operating non-volatile memory using temperature compensation of voltages of unselected word lines and select gates 91 2006
* 2007/0291,566 METHOD FOR OPERATING NON-VOLATILE MEMORY USING TEMPERATURE COMPENSATION OF VOLTAGES OF UNSELECTED WORD LINES AND SELECT GATES 5 2006
7,492,633 System for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines 4 2006
7,349,261 Method for increasing programming speed for non-volatile memory by applying counter-transitioning waveforms to word lines 7 2006
* 2007/0291,543 METHOD FOR INCREASING PROGRAMMING SPEED FOR NON-VOLATILE MEMORY BY APPLYING COUNTER-TRANSITIONING WAVEFORMS TO WORD LINES 3 2006
7,489,549 System for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 21 2006
7,486,561 Method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 9 2006
* 2007/0297,245 SYSTEM FOR NON-REAL TIME REPROGRAMMING OF NON-VOLATILE MEMORY TO ACHIEVE TIGHTER DISTRIBUTION OF THRESHOLD VOLTAGES 10 2006
* 2007/0297,226 METHOD FOR NON-REAL TIME REPROGRAMMING OF NON-VOLATILE MEMORY TO ACHIEVE TIGHTER DISTRIBUTION OF THRESHOLD VOLTAGES 37 2006
7,949,845 Indexing of file data in reprogrammable non-volatile memories that directly store data files 0 2006
7,669,003 Reprogrammable non-volatile memory systems with indexing of directly stored data files 2 2006
7,558,906 Methods of managing blocks in nonvolatile memory 3 2006
7,552,271 Nonvolatile memory with block management 61 2006
7,610,437 Data consolidation and garbage collection in direct data file storage memories 5 2006
7,590,794 Data operations in flash memories utilizing direct data file storage 1 2006
7,590,795 Flash memory systems utilizing direct data file storage 3 2006
7,562,181 Flash memory systems with direct data file storage utilizing data consolidation and garbage collection 4 2006
7,440,326 Programming non-volatile memory with improved boosting 18 2006
7,405,968 Non-volatile memory cell using high-K material and inter-gate programming 36 2006
* 2007/0025,145 NON-VOLATILE MEMORY CELL USING HIGH-K MATERIAL AND INTER-GATE PROGRAMMING 4 2006
7,734,861 Pseudo random and command driven bit compensation for the cycling effects in flash memory 8 2006
7,606,966 Methods in a pseudo random and command driven bit compensation for the cycling effects in flash memory 5 2006
* 2008/0065,812 PSEUDO RANDOM AND COMMAND DRIVEN BIT COMPENSATION FOR THE CYCLING EFFECTS IN FLASH MEMORY 7 2006
7,606,077 Non-volatile memory with reduced erase/write cycling during trimming of initial programming voltage 7 2006
7,606,091 Method for non-volatile memory with reduced erase/write cycling during trimming of initial programming voltage 9 2006
7,599,223 Non-volatile memory with linear estimation of initial programming voltage 5 2006
7,453,731 Method for non-volatile memory with linear estimation of initial programming voltage 11 2006
* 2008/0062,785 Non-Volatile Memory With Reduced Erase/Write Cycling During Trimming of Initial Programming Voltage 4 2006
7,779,056 Managing a pool of update memory blocks based on each block's activity and data order 0 2006
7,774,392 Non-volatile memory with management of a pool of update memory blocks based on each block's activity and data order 1 2006
* 2008/0071,969 Method for Class-Based Update Block Replacement Rules in Non-Volatile Memory 5 2006
7,696,044 Method of making an array of non-volatile memory cells with floating gates formed of spacers in substrate trenches 0 2006
7,646,054 Array of non-volatile memory cells with floating gates formed of spacers in substrate trenches 5 2006
* 2008/0070,363 Method of Making an Array of Non-Volatile Memory Cells With Floating Gates Formed of Spacers in Substrate Trenches 8 2006
7,957,185 Non-volatile memory and method with power-saving read and program-verify operations 4 2006
7,570,513 Non-volatile memory and method with power-saving read and program-verify operations 9 2006
* 2007/0014,161 Non-Volatile Memory and Method With Power-Saving Read and Program-Verify Operations 13 2006
* 2007/0014,156 Non-Volatile Memory and Method With Power-Saving Read and Program-Verify Operations 1 2006
8,189,378 Reducing program disturb in non-volatile storage 1 2006
8,184,478 Apparatus with reduced program disturb in non-volatile storage 0 2006
7,886,204 Methods of cell population distribution assisted read margining 2 2006
7,716,538 Memory with cell population distribution assisted read margining 55 2006
* 2008/0084,748 APPARATUS WITH REDUCED PROGRAM DISTURB IN NON-VOLATILE STORAGE 5 2006
* 2008/0084,747 REDUCING PROGRAM DISTURB IN NON-VOLATILE STORAGE 3 2006
* 2008/0077,841 Methods of Cell Population Distribution Assisted Read Margining 56 2006
* 2008/0077,842 Memory with Cell Population Distribution Assisted Read Margining 8 2006
7,977,186 Providing local boosting control implant for non-volatile memory 1 2006
7,904,783 Soft-input soft-output decoder for nonvolatile memory 64 2006
7,818,653 Methods of soft-input soft-output decoding for nonvolatile memory 8 2006
7,805,663 Methods of adapting operation of nonvolatile memory 70 2006
7,705,387 Non-volatile memory with local boosting control implant 3 2006
* 2008/0092,026 Methods of Soft-Input Soft-Output Decoding for Nonvolatile Memory 105 2006
* 2008/0081,419 PROVIDING LOCAL BOOSTING CONTROL IMPLANT FOR NON-VOLATILE MEMORY 3 2006
* 2008/0082,897 Soft-Input Soft-Output Decoder for Nonvolatile Memory 90 2006
* 2008/0079,052 NON-VOLATILE MEMORY WITH LOCAL BOOSTING CONTROL IMPLANT 3 2006
7,684,247 Reverse reading in non-volatile memory with compensation for coupling 4 2006
7,675,802 Dual voltage flash memory card 6 2006
7,656,735 Dual voltage flash memory methods 0 2006
7,447,076 Systems for reverse reading in non-volatile memory with compensation for coupling 6 2006
7,450,426 Systems utilizing variable program voltage increment values in non-volatile memory program operations 18 2006
* 2008/0084,751 VARIABLE PROGRAM VOLTAGE INCREMENT VALUES IN NON-VOLATILE MEMORY PROGRAM OPERATIONS 7 2006
* 2008/0091,901 Method for non-volatile memory with worst-case control data management 10 2006
7,535,766 Systems for partitioned soft programming in non-volatile memory 18 2006
7,499,338 Partitioned soft programming in non-volatile memory 19 2006
7,499,317 System for partitioned erase and erase verification in a non-volatile memory to compensate for capacitive coupling 10 2006
7,495,954 Method for partitioned erase and erase verification to compensate for capacitive coupling effects in non-volatile memory 13 2006
* 2008/0089,132 Partitioned soft programming in non-volatile memory 4 2006
* 2008/0089,133 Systems for partitioned soft programming in non-volatile memory 4 2006
7,372,748 Voltage regulator in a non-volatile memory device 0 2006
* 2008/0089,141 VOLTAGE REGULATOR IN A NON-VOLATILE MEMORY DEVICE 1 2006
7,691,710 Fabricating non-volatile memory with dual voltage select gate structure 6 2006
7,616,490 Programming non-volatile memory with dual voltage select gate structure 8 2006
7,586,157 Non-volatile memory with dual voltage select gate structure 3 2006
* 2008/0089,128 PROGRAMMING NON-VOLATILE MEMORY WITH DUAL VOLTAGE SELECT GATE STRUCTURE 1 2006
* 2008/0090,351 FABRICATING NON-VOLATILE MEMORY WITH DUAL VOLTAGE SELECT GATE STRUCTURE 2 2006
* 2008/0089,127 NON-VOLATILE MEMORY WITH DUAL VOLTAGE SELECT GATE STRUCTURE 17 2006
7,518,928 Efficient verification for coarse/fine programming of non volatile memory 1 2006
7,317,638 Efficient verification for coarse/fine programming of non-volatile memory 5 2006
* 2007/0091,685 EFFICIENT VERIFICATION FOR COARSE/FINE PROGRAMMING OF NON-VOLATILE MEMORY 19 2006
* 2007/0058,436 EFFICIENT VERIFICATION FOR COARSE/FINE PROGRAMMING OF NON VOLATILE MEMORY 0 2006
7,596,031 Faster programming of highest multi-level state for non-volatile memory 12 2006
7,468,911 Non-volatile memory using multiple boosting modes for reduced program disturb 79 2006
7,440,323 Reducing program disturb in non-volatile memory using multiple boosting modes 14 2006
* 2008/0123,426 NON-VOLATILE MEMORY USING MULTIPLE BOOSTING MODES FOR REDUCED PROGRAM DISTURB 30 2006
* 2008/0123,425 REDUCING PROGRAM DISTURB IN NON-VOLATILE MEMORY USING MULTIPLE BOOSTING MODES 4 2006
8,001,441 Nonvolatile memory with modulated error correction coding 10 2006
7,904,780 Methods of modulating error correction coding 47 2006
7,904,788 Methods of varying read threshold voltage in nonvolatile memory 12 2006
7,558,109 Nonvolatile memory with variable read threshold 155 2006
* 2008/0123,419 Methods of Varying Read Threshold Voltage in Nonvolatile Memory 20 2006
* 2008/0109,703 Nonvolatile Memory With Modulated Error Correction Coding 33 2006
7,696,035 Method for fabricating non-volatile memory with boost structures 3 2006
7,508,710 Operating non-volatile memory with boost structures 77 2006
7,508,703 Non-volatile memory with boost structures 3 2006
* 2008/0112,226 NON-VOLATILE MEMORY WITH BOOST STRUCTURES 19 2006
* 2008/0113,479 FABRICATING NON-VOLATILE MEMORY WITH BOOST STRUCTURES 5 2006
7,508,721 Use of data latches in multi-phase programming of non-volatile memories 23 2006
* 2007/0097,744 Use of Data Latches in Multi-Phase Programming of Non-Volatile Memories 5 2006
7,623,386 Reducing program disturb in non-volatile storage using early source-side boosting 5 2006
7,623,387 Non-volatile storage with early source-side boosting for reducing program disturb 7 2006
7,471,566 Self-boosting system for flash memory cells 7 2006
* 2008/0137,426 NON-VOLATILE STORAGE WITH EARLY SOURCE-SIDE BOOSTING FOR REDUCING PROGRAM DISTURB 2 2006
7,800,161 Flash NAND memory cell array with charge storage elements positioned in trenches 8 2006
7,642,160 Method of forming a flash NAND memory cell array with charge storage elements positioned in trenches 3 2006
* 2008/0149,996 Flash NAND Memory Cell Array With Charge Storage Elements Positioned in Trenches 3 2006
* 2008/0153,226 Method of Forming a Flash NAND Memory Cell Array With Charge Storage Elements Positioned in Trenches 7 2006
8,209,461 Configuration of host LBA interface with flash memory 1 2006
8,166,267 Managing a LBA interface in a direct data file memory system 2 2006
8,046,522 Use of a direct data file system with a continuous logical address space interface and control of file address storage in logical blocks 0 2006
7,917,686 Host system with direct data file interface configurability 0 2006
7,739,444 System using a direct data file system with a continuous logical address space interface 2 2006
* 2008/0155,176 Host System With Direct Data File Interface Configurability 7 2006
* 2008/0155,227 Managing a LBA Interface in a Direct Data File Memory System 13 2006
* 2008/0155,178 Use of a Direct Data File System With a Continuous Logical Address Space Interface 13 2006
7,570,520 Non-volatile storage system with initial programming voltage based on trial 86 2006
7,551,482 Method for programming with initial programming voltage based on trial 7 2006
* 2008/0158,980 NON-VOLATILE STORAGE SYSTEM WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL 11 2006
* 2008/0158,979 METHOD FOR PROGRAMMING WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL 12 2006
7,890,723 Method for code execution 0 2006
7,890,724 System for code execution 0 2006
7,489,547 Method of NAND flash memory cell array with adaptive memory state partitioning 8 2006
7,489,548 NAND flash memory cell array with adaptive memory state partitioning 3 2006
7,468,918 Systems for programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data 13 2006
7,463,531 Systems for programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages 15 2006
7,450,430 Programming non-volatile memory with reduced program disturb by using different pre-charge enable voltages 14 2006
7,433,241 Programming non-volatile memory with reduced program disturb by removing pre-charge dependency on word line data 17 2006
* 2008/0159,002 PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY REMOVING PRE-CHARGE DEPENDENCY ON WORD LINE DATA 5 2006
* 2008/0162,785 METHOD FOR CODE EXECUTION 4 2006
* 2008/0159,004 PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY USING DIFFERENT PRE-CHARGE ENABLE VOLTAGES 3 2006
* 2008/0162,775 SYSTEM FOR CODE EXECUTION 1 2006
* 2008/0159,003 SYSTEMS FOR PROGRAMMING NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB BY REMOVING PRE-CHARGE DEPENDENCY ON WORD LINE DATA 3 2006
7,583,535 Biasing non-volatile storage to compensate for temperature variations 22 2006
7,583,539 Non-volatile storage with bias for temperature compensation 9 2006
7,554,853 Non-volatile storage with bias based on selective word line 1 2006
7,525,843 Non-volatile storage with adaptive body bias 7 2006
7,468,919 Biasing non-volatile storage based on selected word line 20 2006
7,468,920 Applying adaptive body bias to non-volatile storage 10 2006
* 2008/0158,976 BIASING NON-VOLATILE STORAGE BASED ON SELECTED WORD LINE 0 2006
* 2008/0158,970 BIASING NON-VOLATILE STORAGE TO COMPENSATE FOR TEMPERATURE VARIATIONS 8 2006
* 2008/0158,992 NON-VOLATILE STORAGE WITH ADAPTIVE BODY BIAS 4 2006
* 2008/0158,975 NON-VOLATILE STORAGE WITH BIAS FOR TEMPERATURE COMPENSATION 10 2006
* 2008/0158,960 APPLYING ADAPTIVE BODY BIAS TO NON-VOLATILE STORAGE 1 2006
7,577,037 Use of data latches in cache operations of non-volatile memories 5 2007
7,385,854 Selective operation of a multi-state non-volatile memory system in a binary mode 3 2007
* 2007/0109,864 Selective Operation of a Multi-State Non-Volatile Memory System in a Binary Mode 1 2007
7,551,484 Non-volatile memory and method with reduced source line bias errors 0 2007
* 2007/0109,889 Non-Volatile Memory and Method With Reduced Source Line Bias Errors 1 2007
7,660,156 NAND flash memory with a programming voltage held dynamically in a NAND chain channel region 2 2007
* 2007/0109,859 Latched Programming of Memory and Method 2 2007
7,428,171 Non-volatile memory and method with improved sensing 0 2007
* 2007/0109,847 Non-Volatile Memory and Method With Improved Sensing 1 2007
7,391,645 Non-volatile memory and method with compensation for source line bias errors 4 2007
7,391,646 Non-volatile memory and method with control gate compensation for source line bias errors 3 2007
7,502,255 Method for cache page copy in a non-volatile memory 7 2007
7,499,320 Non-volatile memory with cache page copy 5 2007
7,573,773 Flash memory with data refresh triggered by controlled scrub data reads 6 2007
7,477,547 Flash memory refresh techniques triggered by controlled scrub data reads 17 2007
* 2008/0239,808 Flash Memory Refresh Techniques Triggered by Controlled Scrub Data Reads 7 2007
* 2008/0239,851 Flash Memory with Data Refresh Triggered by Controlled Scrub Data Reads 3 2007
7,904,793 Method for decoding data in non-volatile storage using reliability metrics based on multiple reads 33 2007
7,797,480 Method for reading non-volatile storage using pre-conditioning waveforms and modified reliability metrics 1 2007
7,577,031 Non-volatile memory with compensation for variations along a word line 0 2007
7,508,713 Method of compensating variations along a word line in a non-volatile memory 11 2007
* 2008/0250,300 METHOD FOR DECODING DATA IN NON-VOLATILE STORAGE USING RELIABILITY METRICS BASED ON MULTIPLE READS 46 2007
* 2008/0244,162 METHOD FOR READING NON-VOLATILE STORAGE USING PRE-CONDITIONING WAVEFORMS AND MODIFIED RELIABILITY METRICS 7 2007
* 2008/0239,824 Non-Volatile Memory with Compensation for Variations Along a Word Line 4 2007
7,643,348 Predictive programming in non-volatile memory 14 2007
7,551,483 Non-volatile memory with predictive programming 10 2007
* 2008/0253,193 Non-Volatile Memory with Predictive Programming 13 2007
7,606,071 Compensating source voltage drop in non-volatile storage 7 2007
7,606,072 Non-volatile storage with compensation for source voltage drop 2 2007
7,606,079 Reducing power consumption during read operations in non-volatile storage 6 2007
* 2008/0266,975 NON-VOLATILE STORAGE WITH REDUCED POWER CONSUMPTION DURING READ OPERATIONS 4 2007
* 2008/0266,973 REDUCING POWER CONSUMPTION DURING READ OPERATIONS IN NON-VOLATILE STORAGE 21 2007
7,440,327 Non-volatile storage with reduced power consumption during read operations 6 2007
7,463,522 Non-volatile storage with boosting using channel isolation switching 1 2007
7,460,404 Boosting for non-volatile storage using channel isolation switching 6 2007
* 2008/0279,008 NON-VOLATILE STORAGE WITH BOOSTING USING CHANNEL ISOLATION SWITCHING 3 2007
* 2008/0279,007 BOOSTING FOR NON-VOLATILE STORAGE USING CHANNEL ISOLATION SWITCHING 1 2007
7,443,736 Substrate electron injection techniques for programming non-volatile charge storage memory cells and for controlling program disturb 6 2007
7,447,081 Methods for improved program-verify operations in non-volatile memories 19 2007
* 2007/0230,250 Methods for Improved Program-Verify Operations in Non-Volatile Memories 1 2007
7,492,640 Sensing with bit-line lockout control in non-volatile memory 11 2007
7,489,553 Non-volatile memory with improved sensing having bit-line lockout control 9 2007
* 2008/0304,316 SENSING WITH BIT-LINE LOCKOUT CONTROL IN NON-VOLATILE MEMORY 5 2007
8,713,283 Method of interfacing a host operating through a logical address space with a direct file storage medium 1 2007
* 2008/0307,155 Method of Interfacing A Host Operating Through A Logical Address Space With A Direct File STorage Medium 8 2007
7,849,383 Systems and methods for reading nonvolatile memory using multiple reading schemes 9 2007
* 2008/0320,346 SYSTEMS FOR READING NONVOLATILE MEMORY 7 2007
7,545,678 Non-volatile storage with source bias all bit line sensing 4 2007
7,539,060 Non-volatile storage using current sensing with biasing of source and P-Well 1 2007
7,532,516 Non-volatile storage with current sensing of negative threshold voltages 3 2007
7,489,554 Method for current sensing with biasing of source and P-well in non-volatile storage 3 2007
* 2009/0003,068 METHOD FOR SOURCE BIAS ALL BIT LINE SENSING IN NON-VOLATILE STORAGE 2 2007
7,471,567 Method for source bias all bit line sensing in non-volatile storage 11 2007
7,447,079 Method for sensing negative threshold voltages in non-volatile storage using current sensing 24 2007
* 2008/0247,239 METHOD FOR CURRENT SENSING WITH BIASING OF SOURCE AND P-WELL IN NON-VOLATILE STORAGE 0 2007
7,599,224 Systems for coarse/fine program verification in non-volatile memory using different reference levels for improved sensing 14 2007
7,508,715 Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing 19 2007
* 2009/0010,067 COARSE/FINE PROGRAM VERIFICATION IN NON-VOLATILE MEMORY USING DIFFERENT REFERENCE LEVELS FOR IMPROVED SENSING 12 2007
* 2009/0010,068 Systems for Coarse/Fine Program Verification in Non-Volatile Memory Using Different Reference Levels for Improved Sensing 11 2007
7,522,457 Systems for erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage 12 2007
7,457,166 Erase voltage manipulation in non-volatile memory for controlled shifts in threshold voltage 19 2007
* 2008/0019,164 Systems for Erase Voltage Manipulation in Non-Volatile Memory for Controlled Shifts in Threshold Voltage 2 2007
* 2008/0013,360 Erase Voltage Manipulation in Non-Volatile Memory for Controlled Shifts in Threshold Voltage 0 2007
7,471,575 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 5 2007
7,532,514 Non-volatile memory and method with bit line to bit line coupled compensation 24 2007
* 2007/0297,234 Non-Volatile Memory And Method With Bit Line To Bit Line Coupled Compensation 77 2007
7,885,112 Nonvolatile memory and method for on-chip pseudo-randomization of data within a page and between pages 6 2007
* 2009/0067,244 NONVOLATILE MEMORY AND METHOD FOR ON-CHIP PSEUDO-RANDOMIZATION OF DATA WITHIN A PAGE AND BETWEEN PAGES 21 2007
7,894,269 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells 6 2007
7,652,929 Non-volatile memory and method for biasing adjacent word line for verify during programming 12 2007
* 2009/0073,771 Non-Volatile Memory and Method for Biasing Adjacent Word Line for Verify During Programming 13 2007
* 2008/0019,188 Nonvolatile Memory and Method for Compensating During Programming for Perturbing Charges of Neighboring Cells 23 2007
8,026,170 Method of forming a single-layer metal conductors with multiple thicknesses 3 2007
7,577,034 Reducing programming voltage differential nonlinearity in non-volatile storage 5 2007
* 2009/0080,263 REDUCING PROGRAMMING VOLTAGE DIFFERENTIAL NONLINEARITY IN NON-VOLATILE STORAGE 10 2007
* 2009/0080,229 SINGLE-LAYER METAL CONDUCTORS WITH MULTIPLE THICKNESSES 10 2007
7,492,634 Method for programming of multi-state non-volatile memory using smart verify 10 2007
* 2009/0088,876 PORTABLE, DIGITAL MEDIA PLAYER AND ASSOCIATED METHODS 7 2007
7,453,735 Non-volatile memory and control with improved partial page program capability 6 2007
7,573,747 Alternate row-based reading and writing for non-volatile memory 1 2007
* 2008/0049,506 Alternate Row-Based Reading and Writing for Non-Volatile Memory 74 2007
8,296,498 Method and system for virtual fast access non-volatile RAM 4 2007
7,411,827 Boosting to control programming of non-volatile memory 10 2007
7,565,478 Scheduling of housekeeping operations in flash memory systems 6 2007
* 2008/0091,872 Scheduling of Housekeeping Operations in Flash Memory Systems 37 2007
7,688,638 Faster programming of multi-level non-volatile storage through reduced verify operations 6 2007
* 2009/0147,573 FASTER PROGRAMMING OF MULTI-LEVEL NON-VOLATILE STORAGE THROUGH REDUCED VERIFY OPERATIONS 15 2007
7,609,556 Non-volatile memory with improved program-verify operations 4 2007
7,463,528 Temperature compensation of select gates in non-volatile memory 23 2007
7,460,407 Temperature compensation of voltages of unselected word lines in non-volatile memory based on word line position 8 2007
7,764,547 Regulation of source potential to combat cell source IR drop 7 2007
7,701,761 Read, verify word line reference voltage to track source level 5 2007
8,880,483 System and method for implementing extensions to intelligently manage resources of a mass storage system 0 2007
* 2009/0164,705 System and Method for Implementing Extensions to Intelligently Manage Resources of a Mass Storage System 10 2007
7,593,265 Low noise sense amplifier array and method for nonvolatile memory 10 2007
7,468,921 Method for increasing programming speed for non-volatile memory by applying direct-transitioning waveforms to word lines 0 2008
7,567,466 Non-volatile memory with redundancy data buffered in remote buffer circuits 3 2008
7,593,277 Method for compensated sensing in non-volatile memory 1 2008
* 2008/0117,701 Method For Compensated Sensing In Non-Volatile Memory 4 2008
7,460,406 Alternate sensing techniques for non-volatile memories 11 2008
7,834,386 Non-volatile memory with epitaxial regions for limiting cross coupling between floating gates 0 2008
7,807,533 Method for forming non-volatile memory with shield plate for limiting cross coupling between floating gates 4 2008
* 2008/0116,502 NON-VOLATILE MEMORY WITH EPITAXIAL REGIONS FOR LIMITING CROSS COUPLING BETWEEN FLOATING GATES 3 2008
8,239,639 Method and apparatus for providing data type and host file information to a mass storage system 3 2008
8,429,352 Method and system for memory block flushing 3 2008
* 2008/0307,192 Method And System For Storage Address Re-Mapping For A Memory Device 57 2008
* 2008/0307,164 Method And System For Memory Block Flushing 15 2008
7,606,100 Erasing non-volatile memory using individual verification and additional erasing of subsets of memory cells 17 2008
7,577,026 Source and drain side early boosting using local self boosting for non-volatile storage 1 2008
7,606,076 Sensing in non-volatile storage using pulldown to regulated source voltage to remove system noise 9 2008
* 2008/0247,241 SENSING IN NON-VOLATILE STORAGE USING PULLDOWN TO REGULATED SOURCE VOLTAGE TO REMOVE SYSTEM NOISE 3 2008
7,915,664 Non-volatile memory with sidewall channels and raised source/drain regions 0 2008
* 2009/0271,562 Method and system for storage address re-mapping for a multi-bank memory device 92 2008
8,051,240 Compensating non-volatile storage using different pass voltages during program-verify and read 4 2008
* 2009/0282,184 COMPENSATING NON-VOLATILE STORAGE USING DIFFERENT PASS VOLTAGES DURING PROGRAM-VERIFY AND READ 6 2008
7,719,902 Enhanced bit-line pre-charge scheme for increasing channel boosting in non-volatile storage 3 2008
7,957,197 Nonvolatile memory with a current sense amplifier having a precharge circuit and a transfer gate coupled to a sense node 6 2008
* 2009/0296,488 High Speed Sense Amplifier Array and Method for Nonvolatile Memory 14 2008
7,826,271 Nonvolatile memory with index programming and reduced verify 4 2008
7,813,172 Nonvolatile memory with correlated multiple pass programming 3 2008
7,800,945 Method for index programming and reduced verify in nonvolatile memory 7 2008
7,796,435 Method for correlated multiple pass programming in nonvolatile memory 4 2008
* 2009/0310,421 Nonvolatile Memory with Correlated Multiple Pass Programming 6 2008
* 2008/0250,202 FLASH CONTROLLER CACHE ARCHITECTURE 3 2008
7,499,324 Non-volatile memory and method with control gate compensation for source line bias errors 9 2008
8,710,907 Clock generator circuit for a charge pump 0 2008
7,800,956 Programming algorithm to reduce disturb with minimal extra time penalty 12 2008
7,751,249 Minimizing power noise during sensing in memory device 4 2008
7,751,250 Memory device with power noise minimization during sensing 3 2008
7,663,950 Method for column redundancy using data latches in solid-state memories 1 2008
* 2008/0266,957 Method for Column Redundancy Using Data Latches in Solid-State Memories 19 2008
8,151,035 Non-volatile memory and method with multi-stream updating 4 2008
* 2008/0301,359 Non-Volatile Memory and Method With Multi-Stream Updating 8 2008
7,715,235 Non-volatile memory and method for ramp-down programming 4 2008
* 2010/0046,297 NON-VOLATILE MEMORY AND METHOD FOR RAMP-DOWN PROGRAMMING 1 2008
7,796,430 Non-volatile memory using multiple boosting modes for reduced program disturb 6 2008
* 2009/0010,065 NON-VOLATILE MEMORY USING MULTIPLE BOOSTING MODES FOR REDUCED PROGRAM DISTURB 1 2008
8,103,841 Non-volatile memory and method with non-sequential update block management 2 2008
7,913,061 Non-volatile memory and method with memory planes alignment 12 2008
* 2009/0019,217 Non-Volatile Memory And Method With Memory Planes Alignment 5 2008
* 2009/0019,218 Non-Volatile Memory And Method With Non-Sequential Update Block Management 75 2008
7,606,074 Word line compensation in non-volatile memory erase operations 19 2008
* 2009/0021,983 Word Line Compensation In Non-Volatile Memory Erase Operations 14 2008
7,945,759 Non-volatile memory and method with phased program failure handling 5 2008
7,768,836 Nonvolatile memory and method with reduced program verify by ignoring fastest and/or slowest programming bits 3 2008
* 2010/0091,573 Nonvolatile Memory And Method With Reduced Program Verify By Ignoring Fastest And/Or Slowest Programming Bits 14 2008
7,853,772 Method for managing partitions in a storage device 16 2008
7,733,703 Method for non-volatile memory with background data latch caching during read operations 3 2008
8,225,242 Highly compact non-volatile memory and method thereof 0 2008
7,773,414 Self-boosting system for flash memory cells 2 2008
* 2009/0073,761 Self-Boosting System for Flash Memory Cells 5 2008
7,751,244 Applying adaptive body bias to non-volatile storage based on number of programming cycles 3 2008
7,817,476 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 1 2008
* 2009/0103,369 Non-Volatile Memory and Method with Shared Processing for an Aggregate of Read/Write Circuits 1 2008
7,633,802 Non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages 82 2008
* 2009/0103,356 NON-REAL TIME REPROGRAMMING OF NON-VOLATILE MEMORY TO ACHIEVE TIGHTER DISTRIBUTION OF THRESHOLD VOLTAGES 5 2008
7,944,754 Non-volatile memory and method with continuous scanning time-domain sensing 4 2008
7,813,181 Non-volatile memory and method for sensing with pipelined corrections for neighboring perturbations 5 2008
* 2010/0165,738 Non-Volatile Memory And Method For Sensing With Pipelined Corrections For Neighboring Perturbations 7 2008
8,700,840 Nonvolatile memory with write cache having flush/eviction methods 2 2009
8,244,960 Non-volatile memory and method with write cache partition management methods 23 2009
8,094,500 Non-volatile memory and method with write cache partitioning 15 2009
8,040,744 Spare block management of non-volatile memories 79 2009
8,621,323 Pipelined data relocation and improved chip architectures 0 2009
7,768,826 Methods for partitioned erase and erase verification in non-volatile memory to compensate for capacitive coupling effects 9 2009
* 2009/0180,325 Partitioned Erase And Erase Verification In Non-Volatile Memory 3 2009
7,808,832 Non-volatile memory and method with improved sensing having a bit-line lockout control 4 2009
7,864,570 Self-boosting system with suppression of high lateral electric fields 0 2009
* 2009/0147,571 SELF-BOOSTING SYSTEM WITH SUPPRESSION OF HIGH LATERAL ELECTRIC FIELDS 1 2009
8,130,556 Pair bit line programming to improve boost voltage clamping 5 2009
* 2010/0110,792 PAIR BIT LINE PROGRAMMING TO IMPROVE BOOST VOLTAGE CLAMPING 6 2009
7,894,273 Nonvolatile memory and method with reduced program verify by ignoring fastest and/or slowest programming bits 3 2009
* 2010/0091,568 Nonvolatile Memory and Method With Reduced Program Verify by Ignoring Fastest and/or Slowest Programming Bits 15 2009
7,790,562 Method for angular doping of source and drain regions for odd and even NAND blocks 2 2009
8,254,177 Programming non-volatile memory with variable initial programming pulse 2 2009
8,045,375 Programming non-volatile memory with high resolution variable initial programming pulse 5 2009
* 2010/0103,733 PROGRAMMING NON-VOLATILE MEMORY WITH VARIABLE INITIAL PROGRAMMING PULSE 9 2009
8,117,380 Management of non-volatile memory systems having large erase blocks 1 2009
8,027,195 Folding data stored in binary format into multi-state format within non-volatile memory devices 27 2009
* 2010/0318,720 Multi-Bank Non-Volatile Memory System with Satellite File System 2 2009
7,974,124 Pointer based column selection techniques in non-volatile memories 2 2009
7,768,834 Non-volatile storage system with initial programming voltage based on trial 2 2009
* 2009/0257,282 NON-VOLATILE STORAGE SYSTEM WITH INITIAL PROGRAMMING VOLTAGE BASED ON TRIAL 4 2009
8,364,883 Scheduling of housekeeping operations in flash memory systems 0 2009
7,936,602 Use of data latches in cache operations of non-volatile memories 2 2009
7,907,458 Non-volatile memory with redundancy data buffered in remote buffer circuits 0 2009
* 2009/0273,986 Non-Volatile Memory With Redundancy Data Buffered in Remote Buffer Circuits 1 2009
7,852,678 Non-volatile memory with improved sensing by reducing source line current 4 2009
8,339,183 Charge pump with reduced energy consumption through charge sharing and clock boosting suitable for high voltage word line in flash memories 11 2009
7,889,560 Alternate row-based reading and writing for non-volatile memory 4 2009
7,978,526 Low noise sense amplifier array and method for nonvolatile memory 8 2009
* 2010/0008,148 Low Noise Sense Amplifier Array and Method for Nonvolatile Memory 7 2009
7,839,685 Soft errors handling in EEPROM devices 13 2009
* 2010/0020,616 Soft Errors Handling in EEPROM Devices 3 2009
8,018,769 Non-volatile memory with linear estimation of initial programming voltage 5 2009
8,014,197 System and method for programming cells in non-volatile integrated memory devices 0 2009
* 2010/0039,859 System and Method for Programming Cells in Non-Volatile Integrated Memory Devices 3 2009
8,214,700 Non-volatile memory and method with post-write read and adaptive re-write to manage errors 20 2009
7,994,004 Flash memory cell arrays having dual control gates per memory cell charge storage element 2 2009
* 2011/0099,418 Non-Volatile Memory And Method With Post-Write Read And Adaptive Re-Write To Manage Errors 30 2009
* 2010/0047,982 Flash Memory Cell Arrays Having Dual Control Gates Per Memory Cell Charge Storage Element 2 2009
8,301,826 Adaptive mode switching of flash memory address mapping based on host usage characteristics 3 2009
8,284,606 Compensating for coupling during programming 2 2009
* 2010/0067,296 COMPENSATING FOR COUPLING DURING PROGRAMMING 2 2009
8,473,669 Method and system for concurrent background and foreground operations in a non-volatile memory array 1 2009
* 2011/0138,100 METHOD AND SYSTEM FOR CONCURRENT BACKGROUND AND FOREGROUND OPERATIONS IN A NON-VOLATILE MEMORY ARRAY 15 2009
8,102,705 Structure and method for shuffling data within non-volatile memory devices 27 2009
8,194,470 Methods of forming flash device with shared word lines 3 2009
* 2010/0091,569 METHODS OF FORMING FLASH DEVICE WITH SHARED WORD LINES 1 2009
8,468,294 Non-volatile memory with multi-gear control using on-chip folding of data 3 2009
8,423,866 Non-volatile memory and method with post-write read and adaptive re-write to manage errors 2 2009
8,144,512 Data transfer flows for on-chip folding 26 2009
8,054,684 Non-volatile memory and method with atomic program sequence and write abort detection 8 2009
7,965,562 Predictive programming in non-volatile memory 3 2009
7,978,533 NAND flash memory with a programming voltage held dynamically in a NAND chain channel region 1 2009
8,098,526 Reverse reading in non-volatile memory with compensation for coupling 0 2010
8,209,516 Method and system for dual mode access for storage devices 1 2010
8,179,723 Non-volatile memory with boost structures 2 2010
8,054,681 Read, verify word line reference voltage to track source level 0 2010
8,023,322 Non-volatile memory and method with reduced neighboring field errors 1 2010
8,000,146 Applying different body bias to different substrate portions for non-volatile storage 1 2010
7,965,560 Non-volatile memory with power-saving multi-pass sensing 0 2010
7,984,233 Direct data file storage implementation techniques in flash memories 1 2010
8,214,583 Direct file data programming and deletion in flash memories 17 2010
8,036,041 Method for non-volatile memory with background data latch caching during read operations 8 2010
8,543,757 Techniques of maintaining logical to physical mapping information in non-volatile memory systems 0 2010
8,417,876 Use of guard bands and phased maintenance operations to avoid exceeding maximum latency requirements in non-volatile memory systems 0 2010
8,432,732 Detection of word-line leakage in memory arrays 3 2010
8,305,807 Detection of broken word-lines in memory arrays 3 2010
8,464,135 Adaptive flash interface 1 2010
7,902,031 Method for angular doping of source and drain regions for odd and even NAND blocks 0 2010
* 2010/0297,823 METHOD FOR ANGULAR DOPING OF SOURCE AND DRAIN REGIONS FOR ODD AND EVEN NAND BLOCKS 3 2010
8,634,240 Non-volatile memory and method with accelerated post-write read to manage errors 2 2010
8,374,031 Techniques for the fast settling of word lines in NAND flash memory 0 2010
8,452,911 Synchronized maintenance operations in a multi-bank storage system 1 2010
8,106,701 Level shifter with shoot-through current isolation 4 2010
8,045,391 Non-volatile memory and method with improved sensing having bit-line lockout control 4 2010
* 2011/0019,484 Non-Volatile Memory and Method With Improved Sensing Having Bit-Line Lockout Control 1 2010
8,045,378 Nonvolatile memory with correlated multiple pass programming 1 2010
8,873,303 Non-volatile memory and method with shared processing for an aggregate of read/write circuits 0 2010
* 2011/0019,485 Non-Volatile Memory and Method with Shared Processing for an Aggregate of Read/Write Circuits 0 2010
8,914,703 Method for copying data in reprogrammable non-volatile memory 0 2010
8,050,126 Non-volatile memory with improved sensing by reducing source line current 0 2010
* 2011/0075,480 Non-Volatile Memory With Improved Sensing By Reducing Source Line Current 2 2010
8,294,509 Charge pump systems with reduction in inefficiencies due to charge sharing between capacitances 2 2010
8,472,280 Alternate page by page programming scheme 14 2010
* 8,782,495 Non-volatile memory and methods with asymmetric soft read points around hard read points 0 2010
* 2012/0166,913 Non-Volatile Memory And Methods With Asymmetric Soft Read Points Around Hard Read Points 2 2010
8,099,652 Non-volatile memory and methods with reading soft bits in non uniform schemes 12 2010
8,473,813 Methods of cell population distribution assisted read margining 0 2011
8,468,424 Method for decoding data in non-volatile storage using reliability metrics based on multiple reads 1 2011
8,163,622 Method for angular doping of source and drain regions for odd and even NAND blocks 1 2011
* 2011/0151,636 Method For Angular Doping Of Source And Drain Regions For Odd And Even NAND Blocks 2 2011
8,400,839 Nonvolatile memory and method for compensating during programming for perturbing charges of neighboring cells 2 2011
8,228,741 Nonvolatile memory and method with reduced program verify by ignoring fastest and/or slowest programming bits 0 2011
8,363,495 Non-volatile memory with redundancy data buffered in remote buffer circuits 0 2011
* 2011/0157,987 Non-Volatile Memory With Redundancy Data Buffered in Remote Buffer Circuits 2 2011
8,472,257 Nonvolatile memory and method for improved programming with reduced verify 21 2011
8,416,624 Erase and programming techniques to reduce the widening of state distributions in non-volatile memories 2 2011
8,334,796 Hardware efficient on-chip digital temperature coefficient voltage generator and method 1 2011
9,069,688 Dynamic optimization of back-end memory system interface 0 2011
8,427,874 Non-volatile memory and method with even/odd combined block decoding 3 2011
8,537,593 Variable resistance switch suitable for supplying high voltage to drive load 0 2011
8,169,831 High speed sense amplifier array and method for non-volatile memory 2 2011
8,379,454 Detection of broken word-lines in memory arrays 3 2011
8,621,177 Non-volatile memory and method with phased program failure handling 0 2011
8,843,693 Non-volatile memory and method with improved data scrambling 0 2011
8,154,923 Non-volatile memory and method with power-saving read and program-verify operations 1 2011
8,159,876 Non-volatile memory and method for power-saving multi-pass sensing 1 2011
8,295,085 Programming non-volatile memory with high resolution variable initial programming pulse 0 2011
8,427,884 Bit scan circuits and method in non-volatile memory 0 2011
8,300,472 Low noise sense amplifier array and method for nonvolatile memory 0 2011
8,164,957 Reducing energy consumption when applying body bias to substrate having sets of nand strings 1 2011
8,432,740 Program algorithm with staircase waveform decomposed into multiple passes 0 2011
8,775,901 Data recovery for defective word lines during programming of non-volatile memory arrays 0 2011
8,726,104 Non-volatile memory and method with accelerated post-write read using combined verification of multiple pages 4 2011
8,334,180 Flash memory cell arrays having dual control gates per memory cell charge storage element 0 2011
8,699,247 Charge pump system dynamically reconfigurable for read and program 1 2011
8,300,457 Non-volatile memory and method with reduced neighboring field errors 0 2011
8,223,554 Programming non-volatile memory with high resolution variable initial programming pulse 6 2011
8,514,628 Dynamic switching approach to reduce area and power consumption of high voltage charge pumps 2 2011
8,400,212 High voltage charge pump regulation system with fine step adjustment 3 2011
8,239,643 Non-volatile memory and method with control data management 0 2011
8,395,434 Level shifter with negative voltage capability 2 2011
8,351,269 Method for non-volatile memory with background data latch caching during read operations 1 2011
8,705,293 Compact sense amplifier for non-volatile memory suitable for quick pass write 3 2011
8,630,120 Compact sense amplifier for non-volatile memory 1 2011
8,531,889 Non-volatile memory and method with improved sensing having bit-line lockout control 0 2011
8,300,458 Nonvolatile memory with correlated multiple pass programming 2 2011
8,300,473 Non-volatile memory with improved sensing by reducing source line current 0 2011
8,711,625 Bad column management with bit information in non-volatile memory systems 2 2011
8,593,866 Systems and methods for operating multi-bank nonvolatile memory 0 2011
8,811,091 Non-volatile memory and method with improved first pass programming 0 2011
8,762,627 Memory logical defragmentation during garbage collection 0 2011
8,750,042 Combined simultaneous sensing of multiple wordlines in a post-write read (PWR) and detection of NAND failures 28 2011
8,228,729 Structure and method for shuffling data within non-volatile memory devices 0 2011
8,451,667 Pair bit line programming to improve boost voltage clamping 0 2012
8,730,722 Saving of data in cases of word-line to word-line short in memory arrays 3 2012
8,842,473 Techniques for accessing column selecting shift register with skipped entries in non-volatile memories 0 2012
8,760,957 Non-volatile memory and method having a memory array with a high-speed, short bit-line portion 1 2012
9,135,192 Memory system with command queue reordering 0 2012
9,053,066 NAND flash memory interface 0 2012
8,687,421 Scrub techniques for use with dynamic read 1 2012
8,300,459 Non-volatile memory and method for power-saving multi-pass sensing 0 2012
8,995,183 Data retention in nonvolatile memory with multiple data storage formats 0 2012
8,732,391 Obsolete block management for data retention in nonvolatile memory 0 2012
8,713,380 Non-volatile memory and method having efficient on-chip block-copying with controlled error rate 0 2012
8,681,548 Column redundancy circuitry for non-volatile memory 0 2012
9,176,864 Non-volatile memory and method having block management with hot/cold data sorting 0 2012
8,422,302 Programming non-volatile memory with variable initial programming pulse 3 2012
8,725,935 Balanced performance for on-chip folding of non-volatile memories 0 2012
8,566,671 Configurable accelerated post-write read to manage errors 16 2012
9,141,528 Tracking and handling of super-hot data in non-volatile memory systems 0 2012
8,854,900 Non-volatile memory and method with peak current control 0 2012
8,750,045 Experience count dependent program algorithm for flash memory 0 2012
8,737,125 Aggregating data latches for program level determination 1 2012
8,730,724 Common line current for program level determination in flash memory 1 2012
8,842,471 Charge cycling by equalizing and regulating the source, well, and bit line levels during write operations for NAND flash memory: program to verify transition 0 2012
8,811,075 Charge cycling by equalizing and regulating the source, well, and bit line levels during write operations for NAND flash memory: verify to program transition 0 2012
8,737,132 Charge cycling by equalizing the source and bit line levels between pulses during no-verify write operations for NAND flash memory 0 2012
9,224,475 Structures and methods for making NAND flash memory 0 2012
8,411,507 Compensating for coupling during programming 0 2012
8,472,255 Compensation of non-volatile memory chip non-idealities by program pulse adjustment 0 2012
9,153,595 Methods of making word lines and select lines in NAND flash memory 0 2012
8,710,909 -cancellation charge pumps 0 2012
8,421,524 Charge pump systems with reduction in inefficiencies due to charge sharing between capacitances 0 2012
9,076,506 Variable rate parallel to serial shift register 0 2012
8,897,080 Variable rate serial to parallel shift register 0 2012
9,129,854 Full metal gate replacement process for NAND flash memory 0 2012
9,218,881 Flash memory blocks with extended data retention 0 2012
8,902,669 Flash memory with data retention bias 0 2012
8,823,075 Select gate formation for nanodot flat cell 1 2012
8,995,184 Adaptive operation of multi level cell memory 1 2013
9,076,545 Dynamic adjustment of read voltage levels based on memory cell threshold voltage distribution 0 2013
8,971,141 Compact high speed sense amplifier for non-volatile memory and hybrid lockout 0 2013
8,830,745 Memory system with unverified program step 0 2013
9,104,591 Data recovery on cluster failures and ECC enhancements with code word interleaving 0 2013
9,098,205 Data randomization in 3-D memory 0 2013
9,098,428 Data recovery on cluster failures and ECC enhancements with code word interleaving 0 2013
8,995,195 Fast-reading NAND flash memory 1 2013
9,099,532 Processes for NAND flash memory fabrication 0 2013
9,053,011 Selective protection of lower page data during upper page write 0 2013
8,987,802 Method for using nanoparticles to make uniform discrete floating gate layer 1 2013
9,047,974 Erased state reading 0 2013
8,887,011 Erased page confirmation in multilevel memory 0 2013
8,830,717 Optimized configurable NAND parameters 6 2013
9,146,807 Bad column handling in flash memory 0 2013
9,183,945 Systems and methods to avoid false verify and false read 0 2013
9,171,620 Weighted read scrub for nonvolatile memory 0 2013
8,988,941 Select transistor tuning 0 2013
8,923,065 Nonvolatile memory and method with improved I/O interface 0 2013
8,897,085 Immunity against temporary and short power drops in non-volatile memory: pausing techniques 0 2013
8,873,284 Method and system for program scheduling in a multi-layer memory 0 2013
8,817,569 Immunity against temporary and short power drops in non-volatile memory 0 2013
8,942,038 High endurance nonvolatile memory 0 2013
8,520,448 Sequential programming of sets of non-volatile elements to improve boost voltage clamping 0 2013
8,932,948 Memory cell floating gate replacement 0 2013
9,070,449 Defective block management 0 2013
9,164,526 Sigma delta over-sampling charge pump analog-to-digital converter 0 2013
8,966,350 Providing reliability metrics for decoding data in non-volatile storage 0 2013
9,218,890 Adaptive operation of three dimensional memory 0 2013
9,183,086 Selection of data for redundancy calculation in three dimensional nonvolatile memory 0 2013
8,981,835 Efficient voltage doubler 0 2013
9,024,680 Efficiency for charge pumps with low supply voltages 0 2013
9,077,238 Capacitive regulation of charge pumps without refresh operation interruption 0 2013
9,230,656 System for maintaining back gate threshold voltage in three dimensional NAND memory 0 2013
9,007,046 Efficient high voltage bias regulation circuit 0 2013
8,745,322 Management of non-volatile memory systems having large erase blocks 0 2013
8,969,153 NAND string containing self-aligned control gate sidewall cladding 2 2013
9,218,242 Write operations for defect management in nonvolatile memory 0 2013
9,063,671 Write operations with full sequence programming for defect management in nonvolatile memory 0 2013
9,177,663 Dynamic regulation of memory array source line 0 2013
9,142,324 Bad block reconfiguration in nonvolatile memory 0 2013
8,932,955 Triple patterning NAND flash memory with SOC 0 2013
9,240,238 Back gate operation with elevated threshold voltage 0 2013
9,165,683 Multi-word line erratic programming detection 0 2013
9,083,231 Amplitude modulation for pass gate to improve charge pump efficiency 0 2013
8,929,141 Three-dimensional NAND memory with adaptive erase 0 2013
9,177,673 Selection of data for redundancy calculation by likely error rate 0 2013
9,043,537 Update block programming order 0 2013
9,229,644 Targeted copy of data relocation 0 2013
9,141,291 Adaptive context disbursement for improved performance in non-volatile memory systems 0 2013
9,218,283 Multi-die write management 0 2013
9,213,601 Adaptive data re-compaction after post-write read verification operations 0 2013
9,058,881 Systems and methods for partial page programming of multi level cells 0 2013
9,154,027 Dynamic load matching charge pump for reduced current consumption 0 2013
9,122,591 Pipelined data relocation and improved chip architectures 0 2013
9,208,023 Systems and methods for scheduling post-write read in nonvolatile memory 0 2013
9,230,689 Finding read disturbs on non-volatile memories 0 2014
8,873,288 Simultaneous sensing of multiple wordlines and detection of NAND failures 1 2014
8,929,169 Power management for nonvolatile memory array 1 2014
8,902,652 Systems and methods for lower page writes 0 2014
9,013,919 Data randomization in 3-D memory 0 2014
8,909,493 Compensation for sub-block erase 0 2014
8,886,877 In-situ block folding for nonvolatile memory 2 2014
8,971,119 Select transistor tuning 1 2014
8,972,675 Efficient post write read in three dimensional nonvolatile memory 0 2014
9,105,349 Adaptive operation of three dimensional memory 0 2014
9,092,363 Selection of data for redundancy calculation in three dimensional nonvolatile memory 0 2014
9,009,398 Write operations for defect management in nonvolatile memory 0 2014
8,902,658 Three-dimensional NAND memory with adaptive erase 1 2014
8,902,661 Block structure profiling in three dimensional memory 2 2014
9,177,808 Memory device with control gate oxygen diffusion control and method of making thereof 0 2014
9,136,022 Selection of data for redundancy calculation by likely error rate 0 2014
8,964,467 Systems and methods for partial page programming of multi level cells 0 2014
9,182,928 Lower page only host burst writes 0 2014
9,104,556 Update block programming order 0 2014
8,902,647 Write scheme for charge trapping memory 1 2014
9,153,324 Pattern breaking in multi-die write management 0 2014
8,966,330 Bad block reconfiguration in nonvolatile memory 0 2014
9,015,561 Adaptive redundancy in three dimensional memory 0 2014
8,918,577 Three dimensional nonvolatile memory with variable block capacity 0 2014
9,245,898 NAND flash memory integrated circuits and processes with controlled gate height 0 2014
9,229,856 Optimized configurable NAND parameters 0 2014
9,208,895 Cell current control through power supply 0 2014
9,224,637 Bi-level dry etching scheme for transistor contacts 0 2014
9,240,249 AC stress methods to screen out bit line defects 0 2014
9,202,593 Techniques for detecting broken word lines in non-volatile memories 0 2014
9,224,744 Wide and narrow patterning using common process 0 2014
9,236,393 3D NAND memory with socketed floating gate cells 0 2014
9,201,788 In-situ block folding for nonvolatile memory 0 2014
9,123,400 Power management for nonvolatile memory array 0 2014
9,224,502 Techniques for detection and treating memory hole to local interconnect marginality defects 0 2015
9,230,971 NAND string containing self-aligned control gate sidewall cladding 0 2015
9,236,128 Voltage kick to non-selected word line during programming 0 2015
9,111,627 Fast-reading NAND flash memory 0 2015
* Cited By Examiner