Method for implementing a checkpoint between pairs of memory locations using two indicators to indicate the status of each associated pair of memory locations

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United States of America Patent

PATENT NO 5574874
SERIAL NO

08491278

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Abstract

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A method for memory checkpointing which does not involve copying of data and that is virtually instantaneous involves designating the active location at a checkpoint as being the backup for the checkpoint. Until there is a new write operation after the checkpoint, this location is regarded as both the active and the backup location. At the first write operation after the checkpoint, the write is carried out to the other, previously non-designated location. Control of writing and indicating of the status of the locations is carried out by updating two binary bits for each pair of locations, namely, a first modification indicator bit and a second role indicator bit. The modification bits are stored on a resettable RAM for almost instantaneous checkpointing where the location granularity is that of a write operation. The method obviates the need for copying the contents of an active location at a checkpoint.

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Patent Owner(s)

Patent OwnerAddress
TOLSYS LIMITEDDUBLIN

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Coghlan, Brian A Dublin, IE 2 37
Jones, Jeremy O Dublin, IE 3 39
O'Carroll, Philip Dublin, IE 3 45

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