Importance

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Abstract

A phase comparing circuit includes a first device for generating a detection signal in response to a multi-level signal. The detection signal represents whether or not the multi-level signal is in a given level. A second device connected to the first device is operative for generating a first control signal in response to the detection signal generated by the first device and a clock signal. The first control signal represents a time interval between a leading edge of a pulse in the detection signal and a strobe point of the clock signal which immediately follows the leading edge of the pulse in the detection signal. A third device connected to the first device is operative for generating a second control signal in response to the detection signal generated by the first device and the clock signal. The second control signal represents a time interval between the strobe point of the clock signal and a trailing edge of the pulse in the detection signal. A fourth device connected to the second device and the third device for generating a phase error signal in response to the first control signal generated by the second device and the second control signal generated by the third device. The phase error signal represents a difference between a phase of the detection signal generated by the first device and a phase of the clock signal.

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First Claim