Cache memory system having first and second direct-mapped cache memories organized in hierarchical structure
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United States of America Patent
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Dec 3, 1996
Grant Date -
N/A
app pub date -
Sep 30, 1993
filing date -
Sep 30, 1992
priority date (Note) -
Expired
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Abstract
A microprocessor includes a CPU, a main memory and primary and second cache memories of the direct mapped type, that are all implemented on the same LSI chip. The second cache memory's capacity is not greater than the primary cache memory. The primary and second cache memories are organized in a hierarchical structure so that the primary cache memory is accessed before the secondary cache memory, and when the first cache memory is not hit, the secondary cache memory is accessed. Thus, a high performance microprocessor having a small chip area is constructed by adding a small, high speed secondary cache memory, rather than by increasing the memory capacity of the primary cache memory.
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