Optimized binary adder for concurrently generating effective and intermediate addresses
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United States of America Patent
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Dec 10, 1996
Issued Date -
N/A
app pub date -
Mar 10, 1995
filing date -
Oct 17, 1994
priority date (Note) -
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Abstract
Carry-save adder techniques are used to concurrently generate Effective and Intermediate (also known as Relocation or Linear) Addresses with only a single carry propagation for each Address. Base, Scaled Index, and Displacement components are input to a first carry-save adder, which is common to both address calculations. A first sum vector and a first left-shifted carry vector are inputs to a first carry-propagate adder for generating the Effective Address. A second carry-save adder has as inputs a Segment Base Address, said first sum vector, and said first left-shifted carry vector. A second sum vector and a second left-shifted carry vector are inputs to a second carry-propagate adder for generating the Intermediate Address.
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