ECL-CMOS level conversion circuit
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United States of America Patent
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Dec 17, 1996
Issued Date -
N/A
app pub date -
Dec 12, 1995
filing date -
Oct 14, 1992
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a level conversion circuit for converting a pair of first-level signals into a pair of second-level signals, an input buffer circuit converts the pair of first-level signals into a pair of buffered signals which vary within a first voltage range situated below a second voltage range within which the pair of first-level signals vary. An amplifier circuit, which includes a plurality of CMOS differential amplifier circuits cascaded, converts the pair of buffered signals into the pair of second-level signals varying within a third voltage range broader than the second voltage range of the pair of first-level signals.
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