Comparator with built-in hysteresis
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United States of America Patent
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Dec 24, 1996
Issued Date -
N/A
app pub date -
Apr 7, 1995
filing date -
Dec 30, 1994
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A comparator with a built-in hysteresis is disclosed. The comparator has a differential input stage, an output stage, and a bias circuit with a hysteresis circuit. The hysteresis circuit selectively applies a bias voltage to the differential input stage to achieve the hysteresis.
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