Multiprocessor system with processor arbitration and priority level setting by the selected processor
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United States of America Patent
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Dec 31, 1996
Issued Date -
N/A
app pub date -
Feb 10, 1995
filing date -
Apr 22, 1992
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
According to this invention, an interrupt right control unit transfers an interrupt right to a succeeding processor module. When the processor module has the interrupt right, and the interrupt right control unit receives an interrupt signal, the interrupt right control unit outputs an interrupt signal to a corresponding processor and stops transferring the interrupt right. The corresponding processor then sets the priority levels for the processor modules and performs interrupt processing in response to the interrupt signal. Then the corresponding processor causes the interrupt right control unit to continue the transferring of the interrupt right.
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