Data combination circuit device and data combination method

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United States of America Patent

PATENT NO 5592489
SERIAL NO

08312658

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Abstract

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A data combination circuit device includes an unfixed data shift register for shifting and outputting unfixed data, fixed data shift register for shifting and outputting fixed data independent of the unfixed data shift register, a timing signal generator for generating timing signals for causing the unfixed and fixed data shift registers to selectively shift and output data held therein in accordance with the format of slot data to be transmitted, and a buffer register additionally arranged for the fixed data shift register and designed to store fixed data formed by a CPU such that the data can be repeatedly output.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA1-1 SHIBAURA 1-CHOME MINATO-KU TOKYO 1050023 ?1050023

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tanaka, Masayuki Tokyo, JP 361 4182

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