VRAM having isolated array sections for providing write functions that will not affect other array sections
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United States of America Patent
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Jan 14, 1997
Issued Date -
N/A
app pub date -
Feb 27, 1995
filing date -
Mar 11, 1993
priority date (Note) -
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status (Latency Note)
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Abstract
A video RAM having isolated array sections for providing write function that will not affect other array sections. The whole VRAM memory array does not have to be completely read before writing new pixel information to particular array section. At least two separate VRAM activities can be performed simultaneously to different parts of the array. Specifically, to write to one particular section of an array and to and for refreshing other parts of the VRAM. The overall read and write sequences can be shorter. When a particular pixel or memory cell has to be modified or update, only an associated SAM to the particular cell will be activated. This SAM will now only affect the column lines associated with that section of the array containing the activated SAM.
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