Optimizing compiler which generates multiple instruction streams to be executed in parallel

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United States of America Patent

PATENT NO 5598561
SERIAL NO

07918032

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Abstract

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In a compiler which produces an object program from a source program, the automatic parallelization unit is comprised of the parallelizing intermediate code detection unit which detects an intermediate code convertible to other intermediate codes each providing the same result of operation but cannot be determined as to whether the execution of one of the intermediate codes will terminate more quickly than the others without being executed, and the intermediate code parallelizing conversion unit which converts to an intermediate code that executes the converted intermediate code and the original intermediate code in parallel, stops the execution of the other intermediate codes when one of them has terminated execution before the other, and executes return to the original execution control.

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Patent Owner(s)

Patent OwnerAddress
NEC CORPORATION108-8001 TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Funaki, Hiroshi Tokyo, JP 24 256

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