Semiconductor wafer test and burn-in

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5600257
SERIAL NO

08513057

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An apparatus and a method for simultaneously testing or burning in all the integrated circuit chips on a product wafer. The apparatus comprises a glass ceramic carrier having test chips and means for connection to pads of a large number of chips on a product wafer. Voltage regulators on the test chips provide an interface between a power supply and power pads on the product chips, at least one voltage regulator for each product chip. The voltage regulators provide a specified Vdd voltage to the product chips, whereby the Vdd voltage is substantially independent of current drawn by the product chips. The voltage regulators or other electronic means limit current to any product chip if it has a short. The voltage regulator circuit may be gated and variable and it may have sensor lines extending to the product chip. The test chips can also provide test functions such as test patterns and registers for storing test results.

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Patent Owner(s)

Patent OwnerAddress
INTERNATIONAL BUSINESS MACHINES CORPORATIONNEW ORCHARD ROAD ARMONK NY 10504

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Koss, Robert W Burlington, VT 2 128
Leas, James M South Burlington, VT 25 1026
Perry, Charles H Poughkeepsie, NY 35 1027
Van, Horn Jody J Underhill, VT 9 199
Walker, George F New York, NY 57 2682

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