Output enable access for an output buffer
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United States of America Patent
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-
Feb 4, 1997
Grant Date -
N/A
app pub date -
Oct 5, 1994
filing date -
Oct 5, 1994
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
The generation of a controlled voltage signal as a buffer control signal for an output driver provides for relatively less delay for a high output enable access for an output buffer. As the output buffer undergoes the transition from a deselected state to a selected state to generate an output signal corresponding to a high input signal, a first voltage level is generated at a node and output as the control signal for the output driver, providing for an initial pull-up transition for the output signal. A second voltage level is subsequently generated at the node and output as the control signal for the output driver, providing for a steady-state voltage level for the high output signal.
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