Programmable interconnect architecture
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United States of America Patent
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Feb 4, 1997
Issued Date -
N/A
app pub date -
Dec 20, 1995
filing date -
Sep 19, 1986
priority date (Note) -
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Abstract
A user-programmable interconnect architecture, which may be used for logic arrays for digital and analog system design, is disclosed. In one embodiment, a plurality of logic cells or modules in a matrix are connected by vertical and horizontal wiring channels. The wiring channels may in turn be programmed by the user to interconnect the various logic cells to implement the required logic function. The wiring channels comprise wiring segments connected by normally open programmable. Elements situated at the intersection of any two segments to be connected.
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