Importance

Loading Importance Indicators...

Abstract

A CMOS circuit is disclosed for translating a signal from CML to CMOS logic voltage levels. The CMOS circuit includes two amplifier circuits coupled in parallel. The first amplifier circuit comprises of a programmable circuit and a CMOS inverter such that the CMOS inverter can be programmed 'on' or 'off' by the programmable circuit. The programmable circuit includes a programmable element which may be implemented using a fuse or floating gate technology. The second amplifying circuit comprises of a CMOS inverter. When the CMOS inverter in the first amplifier circuit is powered 'on', the CMOS circuit is operating in a full power mode at high speed with both CMOS inverters operating. When the CMOS inverter in the first amplifier circuit is powered 'off', the CMOS circuit is operating in a low power mode at a slower speed with only one CMOS inverter operating. During the full power and low power modes of operation, the translator circuit converts the CML circuit output signal, which has a full rail-to-rail output swing of about 1 volt, to CMOS compatible voltage levels, which is required to drive a TTL level output circuit.

Loading the Abstract Image...

First Claim