Non-Volatile, static random access memory with current limiting
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United States of America Patent
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Feb 11, 1997
Issued Date -
N/A
app pub date -
Oct 27, 1995
filing date -
Oct 17, 1994
priority date (Note) -
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Abstract
The present invention provides a non-volatile, static random access memory (nvSRAM) cell with a current limiting feature that prevents current that is provided to the cell or array of cells during a recall operation in which information is transferred from the non-volatile portion of the cell or array to the static random access memory portion of the cell or array from reaching a point that would be detrimental to the cell or array. The current limiting device is located between the nvSRAM cell or array of cells and ground. In one embodiment, the current limiting device includes a variable resistance and a device for modulating the resistance so that the resistance is high at the beginning of a recall operation and decreases thereafter.
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