Method for manufacturing a semiconductor device

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United States of America Patent

PATENT NO 5604139
SERIAL NO

08385822

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Abstract

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In forming a thin film transistor (TFT) having an offset structure or a lightly doped drain (LDD) structure, a blocking material having a lower etching rate than that of a material constructing a gate electrode is formed. By using the blocking material as a mask, a gate electrode material is side-etched selectively to form gate electrodes. The blocking material is processed selectively and remains in a drain region side. Also, an offset region or an LDD region is formed under the blocking material by performing an impurity ion implantation. On the other hand, after the gate electrodes are formed, a resist is added and then light exposure is performed from a source region side using a light blocking material as a mask, so that the resist remains in a drain region side of the gate electrode. Also, by implanting an impurity ion, an offset region or an LDD region is formed in the drain region side.

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Patent Owner(s)

Patent OwnerAddress
TDK CORPORATION2-5-1 NIHONBASHI CHUO-KU TOKYO 103-6128
SEMICONDUCTOR ENERGY LABORATORY CO LTDATSUGI

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Arai, Michio Tokyo, JP 149 4105
Codama, Mitsufumi Kanagawa, JP 37 1300
Takayama, Ichiro Kanagawa, JP 21 387

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