Controlled tracking of oscillators in a circuit with multiple frequency sensitive elements
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United States of America Patent
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Mar 11, 1997
Grant Date -
N/A
app pub date -
Nov 3, 1995
filing date -
Nov 3, 1995
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An oscillator circuit (143) comprises a master phase-locked loop (PLL) circuit (202) that receives as input a first reference frequency signal (136) and generates a first clock signal (210) in response to an oscillator control signal (212). The oscillator circuit (143) includes a frequency sensitive slave circuit (206) having at least one frequency sensitive element (322) that is responsive to a tracking control signal (214) to generate a second clock signal (216). A tracking control circuit (204) is responsive to the oscillator control signal (212) for generating the tracking control signal (214). The tracking control signal (214) serves as a bias signal, and is connected to the frequency sensitive slave circuit (206) for achieving a fast power up sequence of the oscillator circuit (143).
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