Method for making LCD device in which gate insulator of TFT is formed after the pixel electrode but before the video signal line

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5610738
SERIAL NO

08411207

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An active matrix liquid crystal display device, with a plurality of thin-film transistors provided over a glass substrate each including an anodized oxide film of aluminum gate electrode, in which transparent pixel electrodes are formed in the same plane as the gate electrodes between the glass substrate and amorphous silicon islands over which source and drain electrodes are provided. In such a device structure, in which the spacing between the ITO and the gate electrode can be compacted while ensuring that there are no short-circuits effected between the ITO layer and gate electrode during the manufacture of the LCD device, the gate electrode and, therefore, also the plate (lower) electrode of the capacitor Cadd are first formed, followed by the formation of the AOF layer over the gate electrode and over the plate electrode of the capacitor, respectively. Subsequently, the ITO pixel electrode is formed on the same plane as that of the first conductive layer, corresponding to the gate electrode and plate electrode of capacitor Cadd, and is followed by the formation of a relatively thicker second insulating layer, for example, a nitride insulating layer, on the first insulating layer, namely, the anodized oxide film, and on the pixel electrode. In accordance with this scheme, furthermore, the first insulating layer is formed by anodizing the metal layer constituting the first conductive layer.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
PANASONIC LIQUID CRYSTAL DISPLAY CO LTDJAPAN HYOGO PREFECTURE HYOGO

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Matsukawa, Yuka Mobara, JP 15 503
Matsumaru, Haruo Tokyo, JP 25 854
Sasano, Akira Tokyo, JP 48 1481
Shirahashi, Kazuo Mobara, JP 12 543
Taniguchi, Hideaki Mobara, JP 33 821
Yamamoto, Hideaki Tokorozawa, JP 178 3005

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation