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Abstract

A phase modulated signal demodulation system which is not affected by noise and distortion of an input signal. The system includes a carrier reproduction PLL circuit for generating a reproduction reference clock having a frequency which is N times of a carrier frequency which is synchronized with an N-phase phase modulated input signal, and a clock generation circuit for dividing the reproduction reference clock by 1/N and for generating N clocks, each of which has a different phase offset by 360.degree./N. The system further includes a phase detector which detects a phase of the N-phase phase modulated signal by using the N clocks together with the input N-phase phase modulated signal; and an operating circuit which detects a data edge of the input signal and the reproduction reference clock. The system further includes a data clock reproduction PLL circuit for generating a clock synchronized with a data rate using an output from the operating circuit, and a second clock generation circuit which generates a plurality of clocks for majority judgments using an output of the data clock reproduction PLL circuit. The system further includes a data protection circuit for protecting data generated by the phase detector, and a data generating circuit which outputs a corresponding digital data according to phase information outputted from the phase detector.

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