Importance

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Abstract

An image processing apparatus for use in three-dimensional graphics has a frame buffer in a single device with a SAM port for simultaneously storing image information and depth information per pixel. For high speed pattern filling, the frame buffer has an image buffer for storing image information of a predetermined number of horizontal pixels in response to individual write permit signals for each pixel and a Z buffer for simultaneously outputting stored depth information and storing new depth information in response to write permit signals. A circuit identifying whether an image to be plotted is a horizontal line causes the predetermined number of pixels write permit signal output circuits to simultaneously calculate new depth information, compare the depth information read from the Z buffer with the calculated depth information and simultaneously output the write permit signals relative to the image buffer and Z buffer based on the comparison.

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First Claim