Programmable systolic array system arranged in a found arrangement for passing data through programmable number of cells in a time interleaved manner

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United States of America Patent

PATENT NO 5630154
SERIAL NO

08321278

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Abstract

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A linear systolic array of computation cells, each cell having several vector rotation stages. These stages are programmable to provide efficient implementation of a variety of matrix algorithms. All data movement between cells is via parameterized data packets, and the full linear systolic array is completely data flow driven at the packet level. Physical computation cells can be mapped to act as one or more logical computation cells, allowing a small array to function logically as a larger array through a logical folding. This mapping also allows defective cells to be bypassed for fault tolerance. The array can be used to compute adaptive weights in digital beamforming radar applications.

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Patent Owner(s)

Patent OwnerAddress
RAYTHEON COMPANY50 APPLE HILL DRIVE TEWKSBURY MA 01876

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bolstad, Gregory D Orange, CA 33 4879
Neeld, Kenneth B Fountain Valley, CA 1 138
Robie, Charles J Fullerton, CA 2 357
Staub, John R Corona, CA 30 4773

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