Computer system with cascaded peripheral component interconnect (PCI) buses
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United States of America Patent
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May 20, 1997
Grant Date -
N/A
app pub date -
Oct 25, 1995
filing date -
Oct 25, 1995
priority date (Note) -
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Abstract
A system including primary and secondary PCI (Peripheral Component Interconnect) buses which do not 'livelock'. The system includes two PCI to PCI bridges between the primary and secondary buses. One of the bridges is configured to only act as a target on the primary bus and as a master on the secondary bus, the second bridge is configured to only act as master on the primary bus and as a target on the secondary bus. The determination of which data path is chosen is not made by the bridges and thus the bridges do not bias the direction of transmissions to one bus or to the other bus.
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