Process for fabricating a metallized interconnect structure in a semiconductor device

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United States of America Patent

PATENT NO 5633199
SERIAL NO

08556787

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Abstract

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A process for fabricating a metallized interconnect structure in a semiconductor device includes the steps of depositing a first aluminum layer (22) into a via opening (16) in a dielectric layer (18). A doping layer (24) is deposited by high density plasma sputtering to form a portion thereof in the bottom of the via opening (16). A second aluminum layer (26) is chemical vapor deposited to overlie the doping layer (24) and to fill the via opening (16). An annealing process can then be carried out to diffuse metal dopants from the doping layer (24) into nearby metal regions to provide a uniformly doped metal region within the via opening (16).

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Patent Owner(s)

Patent OwnerAddress
MOTOROLA INC1303 EAST ALGONQUIN ROAD SCHAUMBURG IL 60196 U S A

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Blumenthal, Roc Austin, TX 5 221
Fiordalice, Robert W Austin, TX 18 1066

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