Importance

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Abstract

In a complementary MIS semiconductor device of a dual gate structure, an N-type polysilicon layer for an N-channel transistor and a P-type polysilicon layer for a P-channel transistor are formed on a gate oxide film and a field oxide film. A recessed portion is formed on the field oxide film in a region including a junctioning region of the N-type polysilicon layer and the P-type polysilicon layer such that thicknesses of the polysilicon layers are reduced. A continuous silicide layer is formed on the polysilicon layers. The silicide layer is thin in the recessed portion on the field oxide film and is thick on an active region of each of the transistors. In this semiconductor device of a dual gate type, it is possible to prevent impurities of the polysilicon layers of gate electrodes from being diffused in a transversal direction and restrain an increase in resistance value of each of the gate electrodes.

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First Claim