Semiconductor integrated circuit with a test circuit for input buffer threshold

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United States of America Patent

PATENT NO 5633599
SERIAL NO

08509616

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Abstract

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In a semiconductor integrated circuit provided with a circuit for testing an input buffer threshold voltage, an output node of a first logic gate having its output logic value determined by an output signal of an input buffer, and an output node of a second logic gate having its output logic value determined by a condition setting signal from an external source, are connected to a common signal line. When a standardized voltage for discriminating the threshold voltage is applied to the input buffer, if the input buffer malfunctions, the output signal of the first logic gate collides with the output signal of the second logic gate on the common signal line, so that a power supply current greatly increases.

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Patent Owner(s)

Patent OwnerAddress
NEC CORPORATION108-8001 TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kubota, Shuji Kanagawa, JP 14 532

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