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United States of America Patent
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May 27, 1997
Issued Date -
N/A
app pub date -
Jun 7, 1995
filing date -
Aug 14, 1992
priority date (Note) -
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Abstract
A digital down converter with a programmable mixing down frequency and a programmable extraction bandwidth uses a Read Only Memory, ROM, based sin/cos generator plus a programmable high decimation filter followed by a gain compensating scaling multiplier and a Finite Impulse Response, FIR, filter. Output format options are also programmable, and programming commands are serially loaded into registers. Various components may be isolated for efficient testing and also subsystem operation.
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