Importance

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Abstract

A MOS gate type semiconductor device, comprising an upper source wiring consisting of a plurality of upper source electrodes, an upper drain wiring provided on a semiconductor substrate and consisting of a plurality of upper drain electrodes formed in a comb-like arrangement such that the plurality of upper drain electrodes are engaged with the upper source electrodes, lower source electrodes provided at each of lower portions of adjacent pairs of the upper source electrodes and the upper drain electrodes such that the lower source electrodes are layered below the upper source electrodes and the upper drain electrodes, and lower drain electrodes provided at each of lower portions of adjacent pairs of the upper source electrodes and the upper drain electrodes electrode such that the lower drain electrodes are layered below the upper source electrodes and the upper drain electrodes, wherein the lower source electrodes are connected to the upper source electrodes and the source region, and are disposed so as to form a wave-like shape, and the lower drain electrodes are connected to the upper drain electrodes and the drain region, and are disposed so as to form a wave-like shape.

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First Claim