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Abstract

A dry etch process for etching a semiconductor substrate having a p-n heterojunction formed by contact between a p-layer and a n-layer requires application of a reverse bias voltage of less than a p-n breakdown voltage across the p-n heterojunction. A plasma containing chemically reactive negative ions is directed against the n-layer, with etching of non-masked regions of the substrate continuing until it is substantially stopped at the reverse biased p-n heterojunction. The semiconductor substrate can be cooled or periodically recoated with erodable protective material to limit sidewall damage to the semiconductor substrate while still allowing downward etching. This dry etch process is well suited for construction of dimensionally accurate microdevices and microelectromechanical systems.

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First Claim