Method and structure for loading data into several IC devices
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United States of America Patent
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Jun 17, 1997
Grant Date -
N/A
app pub date -
May 26, 1995
filing date -
May 26, 1995
priority date (Note) -
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Abstract
An apparatus and method for decreasing the amount of time necessary to load configuration data into Field Programmable Gate Arrays (FPGAs) or other integrated circuit devices. In a preferred embodiment, serially arrayed FPGAs receive a concatenated stream of data from a common data bus. As a first FPGA reaches a loading-complete state, an enabling token is passed from the first FPGA to an enabling input on the next FPGA. The process repeats until all devices are completely loaded or fully configured.
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