Mold and method for manufacturing a package for a semiconductor chip and the package manufactured thereby
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United States of America Patent
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Jul 1, 1997
Issued Date -
N/A
app pub date -
Apr 3, 1996
filing date -
Mar 4, 1993
priority date (Note) -
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status (Latency Note)
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Abstract
A mold and a method for manufacturing a semiconductor package and the semiconductor package manufactured thereby. The semiconductor package includes a chip attached to a paddle of a lead frame. And with electrically connecting the chip and inner leads of lead frame with a metal wire, a semi-finished product having electric connections is molded by using molding dies having an extrusion in a cavity for providing an opening on an upper portion of a light receiving region of the chip, and a transparent lid is provided on the upper portion of the opening of the semiconductor package. With the invention being able to provide an excellent resin semiconductor package and improved manufacturing processes, thereby reducing the manufacturing cost, enhancing a productivity and making a manufacturing process simpler.
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