
US Patent No: 5,644,743
Number of patents in Portfolio can not be more than 2000
Hybrid analog-digital phase error detector
Stats
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Jul 1, 1997
Issued date -
Dec 4, 1995
filing date -
08/567,387
serial no -
In Force
status
Importance
Abstract
A hybrid analog-digital phase error detector (107) is utilized for detecting a phase error between first and second clock signals (132, 104). Digital and analog phase error detectors (108, 116) are connected to the first and second clock signals (132, 104), and are utilized for producing digital and analog phase error values (110, 118). The digital and analog controllers (112, 120) connected to the digital and analog phase error detectors (108, 116) execute digital and analog control algorithms based on the digital and analog phase error values (110, 118) to produce digital and analog control signals (114, 122). A summer (124) connected to the outputs of the digital and analog controllers (112, 120) combines the analog control signal (122) and the digital control signal (114) to produce a composite control signal (126) representing the phase error.
First Claim
Related Publications
International Classification(s)
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Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 5,525,935 High-speed bit synchronizer with multi-stage control structure | 29 | 1995 | |
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| 5,430,772 Bit synchronizer for NRZ data | 9 | 1993 | |
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| 4,803,705 Analog phase locked loop | 37 | 1987 | |
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| 5,506,875 Method and apparatus for performing frequency acquisition in all digital phase lock loop | 22 | 1993 | |
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| 4,901,026 Phase detector circuit having latched output characteristic | 13 | 1988 | |