US Patent No: 5,644,743

Number of patents in Portfolio can not be more than 2000

Hybrid analog-digital phase error detector

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Abstract

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A hybrid analog-digital phase error detector (107) is utilized for detecting a phase error between first and second clock signals (132, 104). Digital and analog phase error detectors (108, 116) are connected to the first and second clock signals (132, 104), and are utilized for producing digital and analog phase error values (110, 118). The digital and analog controllers (112, 120) connected to the digital and analog phase error detectors (108, 116) execute digital and analog control algorithms based on the digital and analog phase error values (110, 118) to produce digital and analog control signals (114, 122). A summer (124) connected to the outputs of the digital and analog controllers (112, 120) combines the analog control signal (122) and the digital control signal (114) to produce a composite control signal (126) representing the phase error.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
MOTOROLA MOBILITY LLCLIBERTYVILLE, IL6867

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Barrett, Jr Raymond Louis Ft. Lauderdale, FL 16 123
Davis, Walter L Arlington, WA 78 2638
Herold, Barry W Barrington, IL 56 961
Pajunen, Grazyna Anna Delray Beach, FL 3 27

Cited Art Landscape

Patent Info (Count) # Cites Year
 
KOREA TELECOMMUNICATION AUTHORITY (2)
5,430,772 Bit synchronizer for NRZ data 9 1993
5,525,935 High-speed bit synchronizer with multi-stage control structure 30 1995
 
MITEL CORPORATION (1)
4,803,705 Analog phase locked loop 37 1987
 
MOTOROLA, INC. (1)
5,506,875 Method and apparatus for performing frequency acquisition in all digital phase lock loop 26 1993
 
ROCKWELL INTERNATIONAL CORPORATION (1)
4,901,026 Phase detector circuit having latched output characteristic 13 1988

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
ROUND ROCK RESEARCH, LLC (10)
7,415,404 Method and apparatus for generating a sequence of clock signals 4 2005
7,418,071 Method and apparatus for generating a phase dependent control signal 7 2005
7,373,575 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 1 2006
7,889,593 Method and apparatus for generating a sequence of clock signals 1 2007
7,657,813 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 1 2008
7,602,876 Method and apparatus for generating a phase dependent control signal 6 2008
8,107,580 Method and apparatus for generating a phase dependent control signal 1 2009
7,954,031 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same 1 2009
8,565,008 Method and apparatus for generating a sequence of clock signals 0 2011
8,433,023 Method and apparatus for generating a phase dependent control signal 0 2012
 
SILICON LABORATORIES INC. (2)
7,084,709 Hybrid analog/digital phase lock loop frequency synthesizer 6 2004
7,180,377 Method and apparatus for a hybrid phase lock loop frequency synthesizer 7 2005
 
EVERGREEN MICRO DEVICES CO., LTD. (1)
8,201,012 Load adaptive EMI reduction scheme for switching mode power supply 0 2009
 
MASSACHUSETTS INSTITUTE OF TECHNOLOGY (1)
7,571,359 Clock distribution circuits and methods of operating same that use multiple clock circuits connected by phase detector circuits to generate and synchronize local clock signals 2 2001
 
MICRON TECHNOLOGY, INC. (1)
7,461,286 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding 7 2006
 
TEXAS INSTRUMENTS INCORPORATED (1)
6,636,120 Decimated digital phase-locked loop for high-speed implementation 5 2001