Linear list based DMA control structure
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United States of America Patent
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Jul 1, 1997
Grant Date -
N/A
app pub date -
Mar 3, 1995
filing date -
Mar 3, 1995
priority date (Note) -
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Abstract
Linear list based direct memory access (DMA) control structure for controlling a DMA processor through a linear list of DMA descriptors in memory. A descriptor entry is deposited at the end of the linear list. Each descriptor entry has an address associated with their location in the linear list. A pointer to the linear list points to a single location in the linear Fist. A next descriptor entry is accessed by decrementing the address corresponding to the single location. The descriptor entries are read from the linear list of DMA descriptors DMA transfers are performed.
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