Method of bonding wafers having vias including conductive material
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United States of America Patent
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-
Jul 8, 1997
Grant Date -
N/A
app pub date -
Jun 5, 1995
filing date -
Jun 5, 1995
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A surface mountable integrated circuit and a method of manufacture are disclosed. A wafer 110 has a die with an integrated circuit 119 in one surface of the wafer. A via 130 extends to the opposite surface. The via has a sidewall oxide 131 and is filled with a conductive material such as metal or doped polysilicon. The metal may comprise a barrier layer and an adhesion layer. The second end of the via can be fashioned as a prong 233 or a receptacle 430. Dies with vias can be stacked on top of each other or surface mounted to printed circuit boards or other substrate.
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