Integrated circuit wafer comprising unsingulated dies, and decoder arrangement for individually testing the dies
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United States of America Patent
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-
Jul 15, 1997
Issued Date -
N/A
app pub date -
Sep 14, 1994
filing date -
Jul 2, 1992
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
Unsingulated dies on a wafer may be individually electronically selected using various 'electronic mechanisms' on the wafer. Conductive lines extend on the wafer from the electronic mechanism to the individual dies. The conductive lines may be provided in sets of two or more, such as for providing discrete power and ground connections from the external equipment to the individual dies. Redundant conductive lines may be provided to ensure against 'open' faults. Diode and/or fuses may also be provided in conjunction with the conductive lines to ensure against leakages and shorts. Redundant electronic selection mechanisms may also be provided.
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