Connecting electrode portion in semiconductor device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5648686
SERIAL NO

08506930

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An Al layer which serves as a lead-out electrode is formed on a semiconductor chip. An insulating layer is formed on the semiconductor chip and the Al layer. The insulating layer has an opening formed in that portion thereof which is located on the Al layer, thereby exposing a portion of the Al layer. A multi-level metal layer (barrier metal layer) is formed on the exposed portion of the Al layer and on that portion of the insulating layer which is located along the edge of the opening. A metallic nitride region is provided between a first-level metal layer in the multi-level metal layer and the insulating layer so as to be selectively formed at or under a peripheral portion of the first-level metal layer. A bump electrode is provided on the multi-level metal layer. The resultant semiconductor device is mounted on a circuit board by flip chip bonding, with the bump electrode interposed therebetween.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBATOKYO

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Doi, Kazuhide Kawasaki, JP 12 545
Hirano, Naohiko Kawasaki, JP 32 1037
Hiruta, Yoichi Kashiwa, JP 20 733
Miura, Masayuki Kawasaki, JP 67 508
Okada, Takashi Kawasaki, JP 461 5155

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation