Method of manufacturing a semiconductor accelerometer
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United States of America Patent
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Aug 12, 1997
Issued Date -
N/A
app pub date -
May 31, 1995
filing date -
Jun 12, 1991
priority date (Note) -
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Abstract
A semiconductor accelerometer is formed by attaching a semiconductor layer to a handle wafer by a thick oxide layer. Accelerometer geometry is patterned in the semiconductor layer, which is then used as a mask to etch out a cavity in the underlying thick oxide. The mask may include one or more apertures, so that a mass region will have corresponding apertures to the underlying oxide layer. The structure resulting from an oxide etch has the intended accelerometer geometry of a large volume mass region supported in cantilever fashion by a plurality of piezo-resistive arm regions to a surrounding, supporting portion of the semiconductor layer. Directly beneath this accelerometer geometry is a flex-accommodating cavity realized by the removal of the underlying oxide layer. The semiconductor layer remains attached to the handle wafer by means of the thick oxide layer that surrounds the accelerometer geometry, and which was adequately masked by the surrounding portion of the top semiconductor layer during the oxide etch step. In a second embodiment support arm regions are dimensioned separately from the mass region, using a plurality of buried oxide regions as semiconductor etch stops.
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Patent Owner(s)
- INTERSIL CORPORATION
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Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Beitman, Bruce Allan | Palm Bay, FL | 2 | 30 |
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